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authorTom Rini <trini@konsulko.com>2016-02-24 14:26:28 -0500
committerTom Rini <trini@konsulko.com>2016-02-24 18:44:19 -0500
commitcdb714d7c9c5974a15ea4e37ef9ae111cd4bdf97 (patch)
tree45b80bf36d34c7ef0408407c5fd21c2db4f99b1b /arch
parentfec26e7270ad31e4179d1bd189e5cd8ab93ccba3 (diff)
parente6e34ca3ad43eae88faccb01282385416d23e6e7 (diff)
downloadtalos-obmc-uboot-cdb714d7c9c5974a15ea4e37ef9ae111cd4bdf97.tar.gz
talos-obmc-uboot-cdb714d7c9c5974a15ea4e37ef9ae111cd4bdf97.zip
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/socfpga_arria5_socdk.dts2
-rw-r--r--arch/arm/dts/socfpga_cyclone5_socdk.dts2
-rw-r--r--arch/arm/mach-socfpga/misc.c9
-rwxr-xr-xarch/arm/mach-socfpga/qts-filter.sh14
4 files changed, 18 insertions, 9 deletions
diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
index 5933a406cb..9ac48a1683 100644
--- a/arch/arm/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/dts/socfpga_arria5_socdk.dts
@@ -82,8 +82,10 @@
&qspi {
status = "okay";
+ u-boot,dm-pre-reloc;
flash0: n25q00@0 {
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index a202709d60..da134354d1 100644
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -84,8 +84,10 @@
&qspi {
status = "okay";
+ u-boot,dm-pre-reloc;
flash0: n25q00@0 {
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 9b43b92f5b..ce3ff0acc4 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -104,7 +104,7 @@ static void dwmac_deassert_reset(const unsigned int of_reset_id)
socfpga_per_reset(reset, 0);
}
-int cpu_eth_init(bd_t *bis)
+static int socfpga_eth_reset(void)
{
const void *fdt = gd->fdt_blob;
struct fdtdec_phandle_args args;
@@ -137,6 +137,11 @@ int cpu_eth_init(bd_t *bis)
return 0;
}
+#else
+static int socfpga_eth_reset(void)
+{
+ return 0
+};
#endif
struct {
@@ -232,7 +237,7 @@ int arch_misc_init(void)
setenv("bootmode", bsel_str[bsel].mode);
if (fpga_id >= 0)
setenv("fpgatype", socfpga_fpga_model[fpga_id].var);
- return 0;
+ return socfpga_eth_reset();
}
#endif
diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh
index 1adfbf7384..050d6baa94 100755
--- a/arch/arm/mach-socfpga/qts-filter.sh
+++ b/arch/arm/mach-socfpga/qts-filter.sh
@@ -187,13 +187,13 @@ usage() {
echo "$0 [soc_type] [input_qts_dir] [input_bsp_dir] [output_dir]"
echo "Process QTS-generated headers into U-Boot compatible ones."
echo ""
- echo -e " soc_type\t-\tType of SoC, either 'cyclone5' or 'arria5'."
- echo -e " input_qts_dir\t-\tDirectory with compiled Quartus project"
- echo -e "\t\t\t\tand containing the Quartus project file (QPF)."
- echo -e " input_bsp_dir\t-\tDirectory with generated bsp containing"
- echo -e "\t\t\t\tthe settings.bsp file."
- echo -e " output_dir\t-\tDirectory to store the U-Boot compatible"
- echo -e "\t\t\t\theaders."
+ echo " soc_type - Type of SoC, either 'cyclone5' or 'arria5'."
+ echo " input_qts_dir - Directory with compiled Quartus project"
+ echo " and containing the Quartus project file (QPF)."
+ echo " input_bsp_dir - Directory with generated bsp containing"
+ echo " the settings.bsp file."
+ echo " output_dir - Directory to store the U-Boot compatible"
+ echo " headers."
echo ""
}
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