Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'

8 files changed, 686 insertions, 6 deletions

diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 32d7b98fa6..c17f7f088b 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -25,6 +25,7 @@ obj-y	+= string.o
 obj-$(CONFIG_SYS_X86_TSC_TIMER)	+= tsc_timer.o
 obj-$(CONFIG_VIDEO_VGA)	+= video.o
 obj-$(CONFIG_CMD_ZBOOT)	+= zimage.o
+obj-$(CONFIG_HAVE_FSP) += fsp/
 
 extra-$(CONFIG_USE_PRIVATE_LIBGCC) := lib.a
 
diff --git a/arch/x86/lib/cmd_hob.c b/arch/x86/lib/cmd_hob.c
index a0ef037da1..915746a4f9 100644
--- a/arch/x86/lib/cmd_hob.c
+++ b/arch/x86/lib/cmd_hob.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <command.h>
 #include <linux/compiler.h>
-#include <asm/arch/fsp/fsp_support.h>
+#include <asm/fsp/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile
new file mode 100644
index 0000000000..5b12c12d7a
--- /dev/null
+++ b/arch/x86/lib/fsp/Makefile
@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2015 Google, Inc
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += fsp_car.o
+obj-y += fsp_common.o
+obj-y += fsp_dram.o
+obj-y += fsp_support.o
diff --git a/arch/x86/lib/fsp/fsp_car.S b/arch/x86/lib/fsp/fsp_car.S
new file mode 100644
index 0000000000..5e09568b85
--- /dev/null
+++ b/arch/x86/lib/fsp/fsp_car.S
@@ -0,0 +1,124 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/post.h>
+
+.globl car_init
+car_init:
+	/*
+	 * Note: ebp holds the BIST value (built-in self test) so far, but ebp
+	 * will be destroyed through the FSP call, thus we have to test the
+	 * BIST value here before we call into FSP.
+	 */
+	test	%ebp, %ebp
+	jz	car_init_start
+	post_code(POST_BIST_FAILURE)
+	jmp	die
+
+car_init_start:
+	post_code(POST_CAR_START)
+	lea	find_fsp_header_romstack, %esp
+	jmp	find_fsp_header
+
+find_fsp_header_ret:
+	/* EAX points to FSP_INFO_HEADER */
+	mov	%eax, %ebp
+
+	/* sanity test */
+	cmp	$CONFIG_FSP_ADDR, %eax
+	jb	die
+
+	/* calculate TempRamInitEntry address */
+	mov	0x30(%ebp), %eax
+	add	0x1c(%ebp), %eax
+
+	/* call FSP TempRamInitEntry to setup temporary stack */
+	lea	temp_ram_init_romstack, %esp
+	jmp	*%eax
+
+temp_ram_init_ret:
+	addl	$4, %esp
+	cmp	$0, %eax
+	jnz	car_init_fail
+
+	post_code(POST_CAR_CPU_CACHE)
+
+	/*
+	 * The FSP TempRamInit initializes the ecx and edx registers to
+	 * point to a temporary but writable memory range (Cache-As-RAM).
+	 * ecx: the start of this temporary memory range,
+	 * edx: the end of this range.
+	 */
+
+	/* stack grows down from top of CAR */
+	movl	%edx, %esp
+
+	/*
+	 * TODO:
+	 *
+	 * According to FSP architecture spec, the fsp_init() will not return
+	 * to its caller, instead it requires the bootloader to provide a
+	 * so-called continuation function to pass into the FSP as a parameter
+	 * of fsp_init, and fsp_init() will call that continuation function
+	 * directly.
+	 *
+	 * The call to fsp_init() may need to be moved out of the car_init()
+	 * to cpu_init_f() with the help of some inline assembly codes.
+	 * Note there is another issue that fsp_init() will setup another stack
+	 * using the fsp_init parameter stack_top after DRAM is initialized,
+	 * which means any data on the previous stack (on the CAR) gets lost
+	 * (ie: U-Boot global_data). FSP is supposed to support such scenario,
+	 * however it does not work. This should be revisited in the future.
+	 */
+	movl	$CONFIG_FSP_TEMP_RAM_ADDR, %eax
+	xorl	%edx, %edx
+	xorl	%ecx, %ecx
+	call	fsp_init
+
+.global fsp_init_done
+fsp_init_done:
+	/*
+	 * We come here from FspInit with eax pointing to the HOB list.
+	 * Save eax to esi temporarily.
+	 */
+	movl	%eax, %esi
+	/*
+	 * Re-initialize the ebp (BIST) to zero, as we already reach here
+	 * which means we passed BIST testing before.
+	 */
+	xorl	%ebp, %ebp
+	jmp	car_init_ret
+
+car_init_fail:
+	post_code(POST_CAR_FAILURE)
+
+die:
+	hlt
+	jmp	die
+	hlt
+
+	/*
+	 * The function call before CAR initialization is tricky. It cannot
+	 * be called using the 'call' instruction but only the 'jmp' with
+	 * the help of a handcrafted stack in the ROM. The stack needs to
+	 * contain the function return address as well as the parameters.
+	 */
+	.balign	4
+find_fsp_header_romstack:
+	.long	find_fsp_header_ret
+
+	.balign	4
+temp_ram_init_romstack:
+	.long	temp_ram_init_ret
+	.long	temp_ram_init_params
+temp_ram_init_params:
+_dt_ucode_base_size:
+	/* These next two fields are filled in by ifdtool */
+	.long	0			/* microcode base */
+	.long	0			/* microcode size */
+	.long	CONFIG_SYS_MONITOR_BASE	/* code region base */
+	.long	CONFIG_SYS_MONITOR_LEN	/* code region size */
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
new file mode 100644
index 0000000000..f668259c0e
--- /dev/null
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/post.h>
+#include <asm/processor.h>
+#include <asm/fsp/fsp_support.h>
+
+int print_cpuinfo(void)
+{
+	post_code(POST_CPU_INFO);
+	return default_print_cpuinfo();
+}
+
+void reset_cpu(ulong addr)
+{
+	/* cold reset */
+	outb(0x06, PORT_RESET);
+}
+
+
+int board_pci_post_scan(struct pci_controller *hose)
+{
+	u32 status;
+
+	/* call into FspNotify */
+	debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
+	status = fsp_notify(NULL, INIT_PHASE_PCI);
+	if (status != FSP_SUCCESS)
+		debug("fail, error code %x\n", status);
+	else
+		debug("OK\n");
+
+	return 0;
+}
+
+void board_final_cleanup(void)
+{
+	u32 status;
+
+	/* call into FspNotify */
+	debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
+	status = fsp_notify(NULL, INIT_PHASE_BOOT);
+	if (status != FSP_SUCCESS)
+		debug("fail, error code %x\n", status);
+	else
+		debug("OK\n");
+
+	return;
+}
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
new file mode 100644
index 0000000000..4c0a7c82ca
--- /dev/null
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/fsp/fsp_support.h>
+#include <asm/e820.h>
+#include <asm/post.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	phys_size_t ram_size = 0;
+	const struct hob_header *hdr;
+	struct hob_res_desc *res_desc;
+
+	hdr = gd->arch.hob_list;
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == HOB_TYPE_RES_DESC) {
+			res_desc = (struct hob_res_desc *)hdr;
+			if (res_desc->type == RES_SYS_MEM ||
+			    res_desc->type == RES_MEM_RESERVED) {
+				ram_size += res_desc->len;
+			}
+		}
+		hdr = get_next_hob(hdr);
+	}
+
+	gd->ram_size = ram_size;
+	post_code(POST_DRAM);
+
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = 0;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary.
+ * It overrides the default implementation found elsewhere which simply
+ * picks the end of ram, wherever that may be. The location of the stack,
+ * the relocation address, and how far U-Boot is moved by relocation are
+ * set in the global data structure.
+ */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	return fsp_get_usable_lowmem_top(gd->arch.hob_list);
+}
+
+unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
+{
+	unsigned num_entries = 0;
+	const struct hob_header *hdr;
+	struct hob_res_desc *res_desc;
+
+	hdr = gd->arch.hob_list;
+
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == HOB_TYPE_RES_DESC) {
+			res_desc = (struct hob_res_desc *)hdr;
+			entries[num_entries].addr = res_desc->phys_start;
+			entries[num_entries].size = res_desc->len;
+
+			if (res_desc->type == RES_SYS_MEM)
+				entries[num_entries].type = E820_RAM;
+			else if (res_desc->type == RES_MEM_RESERVED)
+				entries[num_entries].type = E820_RESERVED;
+		}
+		hdr = get_next_hob(hdr);
+		num_entries++;
+	}
+
+	return num_entries;
+}
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
new file mode 100644
index 0000000000..5f96da120e
--- /dev/null
+++ b/arch/x86/lib/fsp/fsp_support.c
@@ -0,0 +1,412 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	Intel
+ */
+
+#include <common.h>
+#include <asm/fsp/fsp_support.h>
+#include <asm/post.h>
+
+/**
+ * Compares two GUIDs
+ *
+ * If the GUIDs are identical then true is returned.
+ * If there are any bit differences in the two GUIDs, then false is returned.
+ *
+ * @guid1:        A pointer to a 128 bit GUID.
+ * @guid2:        A pointer to a 128 bit GUID.
+ *
+ * @retval true:  guid1 and guid2 are identical.
+ * @retval false: guid1 and guid2 are not identical.
+ */
+static bool compare_guid(const struct efi_guid *guid1,
+			 const struct efi_guid *guid2)
+{
+	if (memcmp(guid1, guid2, sizeof(struct efi_guid)) == 0)
+		return true;
+	else
+		return false;
+}
+
+struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void)
+{
+	/*
+	 * This function may be called before the a stack is established,
+	 * so special care must be taken. First, it cannot declare any local
+	 * variable using stack. Only register variable can be used here.
+	 * Secondly, some compiler version will add prolog or epilog code
+	 * for the C function. If so the function call may not work before
+	 * stack is ready.
+	 *
+	 * GCC 4.8.1 has been verified to be working for the following codes.
+	 */
+	volatile register u8 *fsp asm("eax");
+
+	/* Initalize the FSP base */
+	fsp = (u8 *)CONFIG_FSP_ADDR;
+
+	/* Check the FV signature, _FVH */
+	if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) {
+		/* Go to the end of the FV header and align the address */
+		fsp += ((struct fv_header *)fsp)->ext_hdr_off;
+		fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size;
+		fsp  = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8);
+	} else {
+		fsp  = 0;
+	}
+
+	/* Check the FFS GUID */
+	if (fsp &&
+	    ((struct ffs_file_header *)fsp)->name.data1 == FSP_GUID_DATA1 &&
+	    ((struct ffs_file_header *)fsp)->name.data2 == FSP_GUID_DATA2 &&
+	    ((struct ffs_file_header *)fsp)->name.data3 == FSP_GUID_DATA3 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[0] == FSP_GUID_DATA4_0 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[1] == FSP_GUID_DATA4_1 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[2] == FSP_GUID_DATA4_2 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[3] == FSP_GUID_DATA4_3 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[4] == FSP_GUID_DATA4_4 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[5] == FSP_GUID_DATA4_5 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[6] == FSP_GUID_DATA4_6 &&
+	    ((struct ffs_file_header *)fsp)->name.data4[7] == FSP_GUID_DATA4_7) {
+		/* Add the FFS header size to find the raw section header */
+		fsp += sizeof(struct ffs_file_header);
+	} else {
+		fsp = 0;
+	}
+
+	if (fsp &&
+	    ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) {
+		/* Add the raw section header size to find the FSP header */
+		fsp += sizeof(struct raw_section);
+	} else {
+		fsp = 0;
+	}
+
+	return (struct fsp_header *)fsp;
+}
+
+void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list)
+{
+	u32 stack_len;
+	u32 stack_base;
+	u32 stack_top;
+
+	post_code(POST_MRC);
+
+	assert(status == 0);
+
+	/* Get the migrated stack in normal memory */
+	stack_base = (u32)fsp_get_bootloader_tmp_mem(hob_list, &stack_len);
+	assert(stack_base != 0);
+	stack_top  = stack_base + stack_len - sizeof(u32);
+
+	/*
+	 * Old stack base is stored at the very end of the stack top,
+	 * use it to calculate the migrated shared data base
+	 */
+	shared_data = (struct shared_data *)(stack_base +
+			((u32)shared_data - *(u32 *)stack_top));
+
+	/* The boot loader main function entry */
+	fsp_init_done(hob_list);
+}
+
+void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
+{
+	struct shared_data shared_data;
+	fsp_init_f init;
+	struct fsp_init_params params;
+	struct fspinit_rtbuf rt_buf;
+	struct vpd_region *fsp_vpd;
+	struct fsp_header *fsp_hdr;
+	struct fsp_init_params *params_ptr;
+	struct upd_region *fsp_upd;
+
+#ifdef CONFIG_DEBUG_UART
+	setup_early_uart();
+#endif
+
+	fsp_hdr = find_fsp_header();
+	if (fsp_hdr == NULL) {
+		/* No valid FSP info header was found */
+		panic("Invalid FSP header");
+	}
+
+	fsp_upd = &shared_data.fsp_upd;
+	memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf));
+
+	/* Reserve a gap in stack top */
+	rt_buf.common.stack_top = (u32 *)stack_top - 32;
+	rt_buf.common.boot_mode = boot_mode;
+	rt_buf.common.upd_data = fsp_upd;
+
+	/* Get VPD region start */
+	fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base +
+			fsp_hdr->cfg_region_off);
+
+	/* Verify the VPD data region is valid */
+	assert((fsp_vpd->img_rev == VPD_IMAGE_REV) &&
+	       (fsp_vpd->sign == VPD_IMAGE_ID));
+
+	/* Copy default data from Flash */
+	memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset),
+	       sizeof(struct upd_region));
+
+	/* Verify the UPD data region is valid */
+	assert(fsp_upd->terminator == UPD_TERMINATOR);
+
+	/* Override any UPD setting if required */
+	update_fsp_upd(fsp_upd);
+
+	memset(&params, 0, sizeof(struct fsp_init_params));
+	params.nvs_buf = nvs_buf;
+	params.rt_buf = (struct fspinit_rtbuf *)&rt_buf;
+	params.continuation = (fsp_continuation_f)asm_continuation;
+
+	init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init);
+	params_ptr = &params;
+
+	shared_data.fsp_hdr = fsp_hdr;
+	shared_data.stack_top = (u32 *)stack_top;
+
+	post_code(POST_PRE_MRC);
+
+	/*
+	 * Use ASM code to ensure the register value in EAX & ECX
+	 * will be passed into BlContinuationFunc
+	 */
+	asm volatile (
+		"pushl	%0;"
+		"call	*%%eax;"
+		".global asm_continuation;"
+		"asm_continuation:;"
+		"movl	%%ebx, %%eax;"		/* shared_data */
+		"movl	4(%%esp), %%edx;"	/* status */
+		"movl	8(%%esp), %%ecx;"	/* hob_list */
+		"jmp	fsp_continue;"
+		: : "m"(params_ptr), "a"(init), "b"(&shared_data)
+	);
+
+	/*
+	 * Should never get here.
+	 * Control will continue from fsp_continue.
+	 * This line below is to prevent the compiler from optimizing
+	 * structure intialization.
+	 *
+	 * DO NOT REMOVE!
+	 */
+	init(&params);
+}
+
+u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase)
+{
+	fsp_notify_f notify;
+	struct fsp_notify_params params;
+	struct fsp_notify_params *params_ptr;
+	u32 status;
+
+	if (!fsp_hdr)
+		fsp_hdr = (struct fsp_header *)find_fsp_header();
+
+	if (fsp_hdr == NULL) {
+		/* No valid FSP info header */
+		panic("Invalid FSP header");
+	}
+
+	notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify);
+	params.phase = phase;
+	params_ptr = &params;
+
+	/*
+	 * Use ASM code to ensure correct parameter is on the stack for
+	 * FspNotify as U-Boot is using different ABI from FSP
+	 */
+	asm volatile (
+		"pushl	%1;"		/* push notify phase */
+		"call	*%%eax;"	/* call FspNotify */
+		"addl	$4, %%esp;"	/* clean up the stack */
+		: "=a"(status) : "m"(params_ptr), "a"(notify), "m"(*params_ptr)
+	);
+
+	return status;
+}
+
+u32 fsp_get_usable_lowmem_top(const void *hob_list)
+{
+	const struct hob_header *hdr;
+	struct hob_res_desc *res_desc;
+	phys_addr_t phys_start;
+	u32 top;
+
+	/* Get the HOB list for processing */
+	hdr = hob_list;
+
+	/* * Collect memory ranges */
+	top = FSP_LOWMEM_BASE;
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == HOB_TYPE_RES_DESC) {
+			res_desc = (struct hob_res_desc *)hdr;
+			if (res_desc->type == RES_SYS_MEM) {
+				phys_start = res_desc->phys_start;
+				/* Need memory above 1MB to be collected here */
+				if (phys_start >= FSP_LOWMEM_BASE &&
+				    phys_start < (phys_addr_t)FSP_HIGHMEM_BASE)
+					top += (u32)(res_desc->len);
+			}
+		}
+		hdr = get_next_hob(hdr);
+	}
+
+	return top;
+}
+
+u64 fsp_get_usable_highmem_top(const void *hob_list)
+{
+	const struct hob_header *hdr;
+	struct hob_res_desc *res_desc;
+	phys_addr_t phys_start;
+	u64 top;
+
+	/* Get the HOB list for processing */
+	hdr = hob_list;
+
+	/* Collect memory ranges */
+	top = FSP_HIGHMEM_BASE;
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == HOB_TYPE_RES_DESC) {
+			res_desc = (struct hob_res_desc *)hdr;
+			if (res_desc->type == RES_SYS_MEM) {
+				phys_start = res_desc->phys_start;
+				/* Need memory above 1MB to be collected here */
+				if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE)
+					top += (u32)(res_desc->len);
+			}
+		}
+		hdr = get_next_hob(hdr);
+	}
+
+	return top;
+}
+
+u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len,
+				   struct efi_guid *guid)
+{
+	const struct hob_header *hdr;
+	struct hob_res_desc *res_desc;
+
+	/* Get the HOB list for processing */
+	hdr = hob_list;
+
+	/* Collect memory ranges */
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == HOB_TYPE_RES_DESC) {
+			res_desc = (struct hob_res_desc *)hdr;
+			if (res_desc->type == RES_MEM_RESERVED) {
+				if (compare_guid(&res_desc->owner, guid)) {
+					if (len)
+						*len = (u32)(res_desc->len);
+
+					return (u64)(res_desc->phys_start);
+				}
+			}
+		}
+		hdr = get_next_hob(hdr);
+	}
+
+	return 0;
+}
+
+u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len)
+{
+	const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
+	u64 length;
+	u32 base;
+
+	base = (u32)fsp_get_reserved_mem_from_guid(hob_list,
+			&length, (struct efi_guid *)&guid);
+	if ((len != 0) && (base != 0))
+		*len = (u32)length;
+
+	return base;
+}
+
+u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len)
+{
+	const struct efi_guid guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
+	u64 length;
+	u32 base;
+
+	base = (u32)fsp_get_reserved_mem_from_guid(hob_list,
+			&length, (struct efi_guid *)&guid);
+	if ((len != 0) && (base != 0))
+		*len = (u32)length;
+
+	return base;
+}
+
+const struct hob_header *fsp_get_next_hob(uint type, const void *hob_list)
+{
+	const struct hob_header *hdr;
+
+	hdr = hob_list;
+
+	/* Parse the HOB list until end of list or matching type is found */
+	while (!end_of_hob(hdr)) {
+		if (hdr->type == type)
+			return hdr;
+
+		hdr = get_next_hob(hdr);
+	}
+
+	return NULL;
+}
+
+const struct hob_header *fsp_get_next_guid_hob(const struct efi_guid *guid,
+					       const void *hob_list)
+{
+	const struct hob_header *hdr;
+	struct hob_guid *guid_hob;
+
+	hdr = hob_list;
+	while ((hdr = fsp_get_next_hob(HOB_TYPE_GUID_EXT,
+			hdr)) != NULL) {
+		guid_hob = (struct hob_guid *)hdr;
+		if (compare_guid(guid, &(guid_hob->name)))
+			break;
+		hdr = get_next_hob(hdr);
+	}
+
+	return hdr;
+}
+
+void *fsp_get_guid_hob_data(const void *hob_list, u32 *len,
+			    struct efi_guid *guid)
+{
+	const struct hob_header *guid_hob;
+
+	guid_hob = fsp_get_next_guid_hob(guid, hob_list);
+	if (guid_hob == NULL) {
+		return NULL;
+	} else {
+		if (len)
+			*len = get_guid_hob_data_size(guid_hob);
+
+		return get_guid_hob_data(guid_hob);
+	}
+}
+
+void *fsp_get_nvs_data(const void *hob_list, u32 *len)
+{
+	const struct efi_guid guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+
+	return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid);
+}
+
+void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len)
+{
+	const struct efi_guid guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID;
+
+	return fsp_get_guid_hob_data(hob_list, len, (struct efi_guid *)&guid);
+}
diff --git a/arch/x86/lib/pci_type1.c b/arch/x86/lib/pci_type1.c
index 13942a33f7..a251adcacd 100644
--- a/arch/x86/lib/pci_type1.c
+++ b/arch/x86/lib/pci_type1.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <asm/pci.h>
 
 #define cfg_read(val, addr, op)		(*val = op((int)(addr)))
 #define cfg_write(val, addr, op)	op((val), (int)(addr))
@@ -21,7 +22,7 @@ static int								\
 type1_##rw##_config_##size(struct pci_controller *hose,			\
 			      pci_dev_t dev, int offset, type val)	\
 {									\
-	outl(dev | (offset & 0xfc) | 0x80000000, (int)hose->cfg_addr);	\
+	outl(dev | (offset & 0xfc) | PCI_CFG_EN, (int)hose->cfg_addr);	\
 	cfg_##rw(val, hose->cfg_data + (offset & mask), op);		\
 	return 0;							\
 }
@@ -34,10 +35,6 @@ TYPE1_PCI_OP(write, byte, u8, outb, 3)
 TYPE1_PCI_OP(write, word, u16, outw, 2)
 TYPE1_PCI_OP(write, dword, u32, outl, 0)
 
-/* bus mapping constants (used for PCI core initialization) */
-#define PCI_REG_ADDR		0x00000cf8
-#define PCI_REG_DATA		0x00000cfc
-
 void pci_setup_type1(struct pci_controller *hose)
 {
 	pci_set_ops(hose,