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authorBin Meng <bmeng.cn@gmail.com>2014-12-12 21:05:31 +0800
committerSimon Glass <sjg@chromium.org>2014-12-13 22:32:05 -0700
commitbceb9f0fc80c71b8b2a7371288199cdacca1bad9 (patch)
tree1d00bc6193c70c1bb940f339ab15927460c1002f /arch/x86/lib
parent95a5a474665307f231c36d1896d1ca7c6c9680f9 (diff)
downloadtalos-obmc-uboot-bceb9f0fc80c71b8b2a7371288199cdacca1bad9.tar.gz
talos-obmc-uboot-bceb9f0fc80c71b8b2a7371288199cdacca1bad9.zip
x86: Support Intel FSP initialization path in start.S
Per Intel FSP architecture specification, FSP provides 3 routines for bootloader to call. The first one is the TempRamInit (aka Cache-As-Ram initialization) and the second one is the FspInit which does the memory bring up (like MRC for other x86 targets) and chipset initialization. Those two routines have to be called before U-Boot jumping to board_init_f in start.S. The FspInit() will return several memory blocks called Hand Off Blocks (HOBs) whose format is described in Platform Initialization (PI) specification (part of the UEFI specication) to the bootloader. Save this HOB address to the U-Boot global data for later use. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib')
-rw-r--r--arch/x86/lib/asm-offsets.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 50a488f4f1..70ccf1b0b0 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -18,5 +18,8 @@
int main(void)
{
DEFINE(GD_BIST, offsetof(gd_t, arch.bist));
+#ifdef CONFIG_HAVE_FSP
+ DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list));
+#endif
return 0;
}
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