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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-10-11 21:37:42 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-10-21 07:46:27 -0600 |
| commit | ff1e18af9dad21fe4963da80b3cf4170f8d6f209 (patch) | |
| tree | 3b97da44251c910c52ac80fc30850dc1ca87d8e6 /arch/x86/lib/fsp/fsp_dram.c | |
| parent | 4b9f6a669ee22ac4694a3a339e94e8fe30bfad1f (diff) | |
| download | talos-obmc-uboot-ff1e18af9dad21fe4963da80b3cf4170f8d6f209.tar.gz talos-obmc-uboot-ff1e18af9dad21fe4963da80b3cf4170f8d6f209.zip | |
x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init()
fsp_init() call has a parameter nvs_buf which is used by FSP as the
MRC cache but currently is blindly set to NULL. Retreive the MRC
cache from SPI flash and pass it to fsp_init() call. After the call,
save FSP produced MRC cache to SPI flash too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib/fsp/fsp_dram.c')
| -rw-r--r-- | arch/x86/lib/fsp/fsp_dram.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index e51ca96eb7..fcfe693ce5 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -7,6 +7,7 @@ #include <common.h> #include <asm/fsp/fsp_support.h> #include <asm/e820.h> +#include <asm/mrccache.h> #include <asm/post.h> DECLARE_GLOBAL_DATA_PTR; @@ -32,6 +33,11 @@ int dram_init(void) gd->ram_size = ram_size; post_code(POST_DRAM); +#ifdef CONFIG_ENABLE_MRC_CACHE + gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, + &gd->arch.mrc_output_len); +#endif + return 0; } |
