diff options
author | Simon Glass <sjg@chromium.org> | 2014-11-14 18:18:43 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2014-11-25 06:34:02 -0700 |
commit | 18739e2ccc66e13dba10a7cb4578910daf455f01 (patch) | |
tree | 3b80e9bd185f69041ad4cd1686d1bf95c08762f4 /arch/x86/include/asm/turbo.h | |
parent | a6d4c453069303c3d1a499d2282f423b35c8f3b0 (diff) | |
download | talos-obmc-uboot-18739e2ccc66e13dba10a7cb4578910daf455f01.tar.gz talos-obmc-uboot-18739e2ccc66e13dba10a7cb4578910daf455f01.zip |
x86: Add Intel speedstep and turbo mode code
Intel chips have a turbo mode where they can run faster for a short period
until they reach thermal limits. Add code to adjust and query this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/turbo.h')
-rw-r--r-- | arch/x86/include/asm/turbo.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/x86/include/asm/turbo.h b/arch/x86/include/asm/turbo.h new file mode 100644 index 0000000000..bb0d4b4354 --- /dev/null +++ b/arch/x86/include/asm/turbo.h @@ -0,0 +1,31 @@ +/* + * From coreboot file of the same name + * + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _ASM_TURBO_H +#define _ASM_TURBO_H + +#define CPUID_LEAF_PM 6 +#define PM_CAP_TURBO_MODE (1 << 1) + +#define MSR_IA32_MISC_ENABLES 0x1a0 +#define H_MISC_DISABLE_TURBO (1 << 6) + +enum { + TURBO_UNKNOWN, + TURBO_UNAVAILABLE, + TURBO_DISABLED, + TURBO_ENABLED, +}; + +/* Return current turbo state */ +int turbo_get_state(void); + +/* Enable turbo */ +void turbo_enable(void); + +#endif |