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| author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:23 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:14 +0100 |
| commit | 8e0df066ffc40fde4cf43014114f8e472b8b9bd6 (patch) | |
| tree | 37c047232a6870908a48c432186b8722fd816fdd /arch/x86/include/asm/post.h | |
| parent | 9c678e152a9a5f2ca786af15e6816ddeaa520c8b (diff) | |
| download | talos-obmc-uboot-8e0df066ffc40fde4cf43014114f8e472b8b9bd6.tar.gz talos-obmc-uboot-8e0df066ffc40fde4cf43014114f8e472b8b9bd6.zip | |
x86: ivybridge: Add early init for PCH devices
Many PCH devices are hard-coded to a particular PCI address. Set these
up early in case they are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/post.h')
| -rw-r--r-- | arch/x86/include/asm/post.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/post.h b/arch/x86/include/asm/post.h index b203dc99b0..61dcda190a 100644 --- a/arch/x86/include/asm/post.h +++ b/arch/x86/include/asm/post.h @@ -25,6 +25,8 @@ #define POST_START_STACK 0x29 #define POST_START_DONE 0x2a #define POST_CPU_INIT 0x2b +#define POST_EARLY_INIT 0x2c +#define POST_CPU_INFO 0x2d /* Output a post code using al - value must be 0 to 0xff */ #ifdef __ASSEMBLY__ |
