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| author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:10 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:11 +0100 |
| commit | 70a09c6c3dc25b200a9d0475afcf5dfc9836b18e (patch) | |
| tree | 8b4433ebbbbd7e558b4a291cb2ccd2aec14ab710 /arch/x86/include/asm/post.h | |
| parent | d1cd045982b1e1e4db2c1cc2b2b932f739b78a11 (diff) | |
| download | talos-obmc-uboot-70a09c6c3dc25b200a9d0475afcf5dfc9836b18e.tar.gz talos-obmc-uboot-70a09c6c3dc25b200a9d0475afcf5dfc9836b18e.zip | |
x86: chromebook_link: Implement CAR support (cache as RAM)
Add support for CAR so that we have memory to use prior to DRAM init.
On link there is a total of 128KB of CAR available, although some is
used for the memory reference code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/post.h')
| -rw-r--r-- | arch/x86/include/asm/post.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/x86/include/asm/post.h b/arch/x86/include/asm/post.h index 33711854af..b203dc99b0 100644 --- a/arch/x86/include/asm/post.h +++ b/arch/x86/include/asm/post.h @@ -13,9 +13,18 @@ /* post codes which represent various stages of init */ #define POST_START 0x1e #define POST_CAR_START 0x1f - +#define POST_CAR_SIPI 0x20 +#define POST_CAR_MTRR 0x21 +#define POST_CAR_UNCACHEABLE 0x22 +#define POST_CAR_BASE_ADDRESS 0x23 +#define POST_CAR_MASK 0x24 +#define POST_CAR_FILL 0x25 +#define POST_CAR_ROM_CACHE 0x26 +#define POST_CAR_MRC_CACHE 0x27 +#define POST_CAR_CPU_CACHE 0x28 #define POST_START_STACK 0x29 #define POST_START_DONE 0x2a +#define POST_CPU_INIT 0x2b /* Output a post code using al - value must be 0 to 0xff */ #ifdef __ASSEMBLY__ @@ -23,6 +32,8 @@ movb $value, %al; \ outb %al, $POST_PORT #else +#include <asm/io.h> + static inline void post_code(int code) { outb(code, POST_PORT); |
