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| author | Bin Meng <bmeng.cn@gmail.com> | 2016-01-27 00:56:34 -0800 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-28 13:53:30 +0800 |
| commit | 81aaa3d9fce5ce9641e5f0c3354da876d859b3b6 (patch) | |
| tree | 410ef19c0021dd425a6955c6bf2ca85ab077ea77 /arch/x86/dts/chromebook_link.dts | |
| parent | a5dd1e6726c1bc249eaf230bad3eb14764a71998 (diff) | |
| download | talos-obmc-uboot-81aaa3d9fce5ce9641e5f0c3354da876d859b3b6.tar.gz talos-obmc-uboot-81aaa3d9fce5ce9641e5f0c3354da876d859b3b6.zip | |
x86: Correct spi node alias
With recent changes spi node was moved to a place as a subnode under
pch, so update the alias to refer to its correct place as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/dts/chromebook_link.dts')
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index d148d6e349..58072031df 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -11,7 +11,7 @@ compatible = "google,link", "intel,celeron-ivybridge"; aliases { - spi0 = "/pci/pch/spi"; + spi0 = &spi; usb0 = &usb_0; usb1 = &usb_1; }; @@ -252,7 +252,7 @@ /* Enable EC SMI source */ intel,alt-gp-smi-enable = <0x0100>; - spi { + spi: spi { #address-cells = <1>; #size-cells = <0>; compatible = "intel,ich-spi"; |
