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author | Tom Rini <trini@konsulko.com> | 2016-06-12 09:55:16 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2016-06-12 09:55:16 -0400 |
commit | b57129dbdade13ee152daf15a4221d8582f48387 (patch) | |
tree | 6f3930a8a77cb163233e0cd6b1dcbe9784e776ec /arch/x86/dts/bayleybay.dts | |
parent | a646f6698173ef4ff34c414f91541b4b8f014de1 (diff) | |
parent | 9769e05bcf79939bad23a719982dd1f85a110f3c (diff) | |
download | talos-obmc-uboot-b57129dbdade13ee152daf15a4221d8582f48387.tar.gz talos-obmc-uboot-b57129dbdade13ee152daf15a4221d8582f48387.zip |
Merge branch 'master' of git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch/x86/dts/bayleybay.dts')
-rw-r--r-- | arch/x86/dts/bayleybay.dts | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 4a50d8665e..c8907ce44b 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -65,6 +65,26 @@ }; }; + pch_pinctrl { + compatible = "intel,x86-pinctrl"; + reg = <0 0>; + + /* + * As of today, the latest version FSP (gold4) for BayTrail + * misses the PAD configuration of the SD controller's Card + * Detect signal. The default PAD value for the CD pin sets + * the pin to work in GPIO mode, which causes card detect + * status cannot be reflected by the Present State register + * in the SD controller (bit 16 & bit 18 are always zero). + * + * Configure this pin to function 1 (SD controller). + */ + sdmmc3_cd@0 { + pad-offset = <0x3a0>; + mode-func = <1>; + }; + }; + pci { compatible = "pci-x86"; #address-cells = <3>; @@ -213,7 +233,7 @@ fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; - fsp,emmc-boot-mode = <2>; + fsp,emmc-boot-mode = <1>; fsp,enable-sdio; fsp,enable-sdcard; fsp,enable-hsuart1; |