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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-04-24 18:10:03 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-04-29 18:51:49 -0600 |
| commit | e3e7fa2cd16646f331ddc4f611bcc91bb54a7075 (patch) | |
| tree | 4e59cbd4ec0f58be634dfcd59a468543f4732b86 /arch/x86/cpu/pci.c | |
| parent | 54c6001bbac1cb3b6b85605d115e5f73ef1ab198 (diff) | |
| download | talos-obmc-uboot-e3e7fa2cd16646f331ddc4f611bcc91bb54a7075.tar.gz talos-obmc-uboot-e3e7fa2cd16646f331ddc4f611bcc91bb54a7075.zip | |
x86: Add a function to assign IRQ numbers to PCI device
Add a function to assign an IRQ number to PCI device's interrupt
line register in its configuration space, so that the PCI device
can have its interrupt working under PIC mode after OS boots up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/pci.c')
| -rw-r--r-- | arch/x86/cpu/pci.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index e23b233961..c209f15ec4 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -151,3 +151,24 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, return 0; } + +void pci_assign_irqs(int bus, int device, int func, u8 irq[4]) +{ + pci_dev_t bdf; + u8 pin, line; + + bdf = PCI_BDF(bus, device, func); + + pin = x86_pci_read_config8(bdf, PCI_INTERRUPT_PIN); + + /* PCI spec says all values except 1..4 are reserved */ + if ((pin < 1) || (pin > 4)) + return; + + line = irq[pin - 1]; + + debug("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n", + line, bus, device, func, 'A' + pin - 1); + + x86_pci_write_config8(bdf, PCI_INTERRUPT_LINE, line); +} |
