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| author | Mike Frysinger <vapier@gentoo.org> | 2011-10-27 04:59:59 -0400 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2011-12-02 13:46:21 +0900 |
| commit | 172106433b68bfcc25d025fca346021f005166b7 (patch) | |
| tree | f610580e94f3d134046771fd0cc5f93a21425745 /arch/sh | |
| parent | 3ed81645874413d31c5012cb958abd3bc5008b0c (diff) | |
| download | talos-obmc-uboot-172106433b68bfcc25d025fca346021f005166b7.tar.gz talos-obmc-uboot-172106433b68bfcc25d025fca346021f005166b7.zip | |
sh: avoid multiple definition errors with cache funcs
Recent builds for SH4 boards fail with a lot of errors like:
cmd_mem.o: In function 'dcache_invalid_range':
include/asm/cache.h:25: multiple definition of 'dcache_invalid_range'
include/asm/cache.h:25: first defined here
This is due to the funcs being defined in the header, but not static
or inline or extern. So move them to the sh4-specific cache.c file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/cpu/sh4/cache.c | 22 | ||||
| -rw-r--r-- | arch/sh/include/asm/cache.h | 24 |
2 files changed, 25 insertions, 21 deletions
diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c index 377005cd4d..dc75e3981c 100644 --- a/arch/sh/cpu/sh4/cache.c +++ b/arch/sh/cpu/sh4/cache.c @@ -106,3 +106,25 @@ int cache_control(unsigned int cmd) return 0; } + +void dcache_wback_range(u32 start, u32 end) +{ + u32 v; + + start &= ~(L1_CACHE_BYTES - 1); + for (v = start; v < end; v += L1_CACHE_BYTES) { + asm volatile ("ocbwb %0" : /* no output */ + : "m" (__m(v))); + } +} + +void dcache_invalid_range(u32 start, u32 end) +{ + u32 v; + + start &= ~(L1_CACHE_BYTES - 1); + for (v = start; v < end; v += L1_CACHE_BYTES) { + asm volatile ("ocbi %0" : /* no output */ + : "m" (__m(v))); + } +} diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index 6ffab4d374..24941b3019 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -10,27 +10,9 @@ int cache_control(unsigned int cmd); struct __large_struct { unsigned long buf[100]; }; #define __m(x) (*(struct __large_struct *)(x)) -void dcache_wback_range(u32 start, u32 end) -{ - u32 v; - - start &= ~(L1_CACHE_BYTES - 1); - for (v = start; v < end; v += L1_CACHE_BYTES) { - asm volatile ("ocbwb %0" : /* no output */ - : "m" (__m(v))); - } -} - -void dcache_invalid_range(u32 start, u32 end) -{ - u32 v; - - start &= ~(L1_CACHE_BYTES - 1); - for (v = start; v < end; v += L1_CACHE_BYTES) { - asm volatile ("ocbi %0" : /* no output */ - : "m" (__m(v))); - } -} +void dcache_wback_range(u32 start, u32 end); +void dcache_invalid_range(u32 start, u32 end); + #else /* |
