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authorKim Phillips <kim.phillips@freescale.com>2011-08-14 23:09:39 -0500
committerKim Phillips <kim.phillips@freescale.com>2011-11-03 18:27:51 -0500
commit63063cc7ae690b418b1dae1cb21004587361369e (patch)
treed4e01e592e002b8a4f25b54a5218238313824324 /arch/powerpc
parentfec79acc864bed049b6beae719ccbf2bbec5403a (diff)
downloadtalos-obmc-uboot-63063cc7ae690b418b1dae1cb21004587361369e.tar.gz
talos-obmc-uboot-63063cc7ae690b418b1dae1cb21004587361369e.zip
mpc83xx: fix global timer structure definition
The byte address distance between GTCFR2 and GTMDR1 is 11, not 10. Reported-by: Shawn Bai <programassem@hotmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/immap_83xx.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index 8d4c9cb4f7..2daddebe55 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -113,7 +113,7 @@ typedef struct gtm83xx {
u8 cfr1; /* Timer1/2 Configuration */
u8 res0[3];
u8 cfr2; /* Timer3/4 Configuration */
- u8 res1[10];
+ u8 res1[11];
u16 mdr1; /* Timer1 Mode Register */
u16 mdr2; /* Timer2 Mode Register */
u16 rfr1; /* Timer1 Reference Register */
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