summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/cpu/mpc8xxx/srio.c
diff options
context:
space:
mode:
authorLiu Gang <Gang.Liu@freescale.com>2012-08-09 05:09:59 +0000
committerAndy Fleming <afleming@freescale.com>2012-08-23 10:24:14 -0500
commitff65f12699b4181b777cbc03b057510bc4605f5e (patch)
tree23450ac7d9f92ef9dc2e9e88a8eb951d50332475 /arch/powerpc/cpu/mpc8xxx/srio.c
parent51928df64ce29ca4c412fe5f3e063cb05e5411c7 (diff)
downloadtalos-obmc-uboot-ff65f12699b4181b777cbc03b057510bc4605f5e.tar.gz
talos-obmc-uboot-ff65f12699b4181b777cbc03b057510bc4605f5e.zip
powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build target
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as a SRIO boot master via environment variable. Set the environment variable "bootmaster" to "SRIO1" or "SRIO2" using the following command: setenv bootmaster SRIO1 saveenv The "bootmaster" will enable the function of the SRIO boot master, and this has the following advantages compared with SRIOBOOT_MASTER build configuration: 1. Reduce a build configuration item in boards.cfg file. No longer need to build a special image for master, just use a normal target image and set the "bootmaster" variable. 2. No longer need to rebuild an image when change the SRIO port for boot from SRIO, just set the corresponding value to "bootmaster" based on the using SRIO port. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/srio.c')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/srio.c137
1 files changed, 48 insertions, 89 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index c7f394972b..ae83d6e172 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -95,126 +95,92 @@ void srio_init(void)
}
}
-#ifdef CONFIG_SRIOBOOT_MASTER
-void srio_boot_master(void)
+#ifdef CONFIG_FSL_CORENET
+void srio_boot_master(int port)
{
struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
/* set port accept-all */
- out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
+ out_be32((void *)&srio->impl.port[port - 1].ptaacr,
SRIO_PORT_ACCEPT_ALL);
- debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n", port);
/* configure inbound window for slave's u-boot image */
debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS1,
CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[0].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[0].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS1 >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[0].riwar,
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
/* configure inbound window for slave's u-boot image */
debug("SRIOBOOT - MASTER: Inbound window for slave's image; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
- (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS2,
CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
- CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[1].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[1].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_IMAGE_MEM_BUS2 >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[1].riwar,
SRIO_IB_ATMU_AR
| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
- /* configure inbound window for slave's ucode */
- debug("SRIOBOOT - MASTER: Inbound window for slave's ucode; "
+ /* configure inbound window for slave's ucode and ENV */
+ debug("SRIOBOOT - MASTER: Inbound window for slave's ucode and ENV; "
"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
- (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS,
- (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS,
- CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwtar,
- CONFIG_SRIOBOOT_SLAVE_UCODE_LAW_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwbar,
- CONFIG_SRIOBOOT_SLAVE_UCODE_SRIO_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[2].riwar,
- SRIO_IB_ATMU_AR
- | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_SIZE));
-
- /* configure inbound window for slave's ENV */
- debug("SRIOBOOT - MASTER: Inbound window for slave's ENV; "
- "Local = 0x%llx, Siro = 0x%llx, Size = 0x%x\n",
- CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS,
- CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS,
- CONFIG_SRIOBOOT_SLAVE_ENV_SIZE);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwtar,
- CONFIG_SRIOBOOT_SLAVE_ENV_LAW_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwbar,
- CONFIG_SRIOBOOT_SLAVE_ENV_SRIO_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[3].riwar,
+ (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_PHYS,
+ (u64)CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_BUS,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_SIZE);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[2].riwtar,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_PHYS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[2].riwbar,
+ CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_MEM_BUS >> 12);
+ out_be32((void *)&srio->atmu.port[port - 1].inbw[2].riwar,
SRIO_IB_ATMU_AR
- | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_ENV_SIZE));
+ | atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_UCODE_ENV_SIZE));
}
-#ifdef CONFIG_SRIOBOOT_SLAVE_HOLDOFF
-void srio_boot_master_release_slave(void)
+void srio_boot_master_release_slave(int port)
{
struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
u32 escsr;
debug("SRIOBOOT - MASTER: "
"Check the port status and release slave core ...\n");
- escsr = in_be32((void *)&srio->lp_serial
- .port[CONFIG_SRIOBOOT_MASTER_PORT].pescsr);
+ escsr = in_be32((void *)&srio->lp_serial.port[port - 1].pescsr);
if (escsr & 0x2) {
if (escsr & 0x10100) {
debug("SRIOBOOT - MASTER: Port [ %d ] is error.\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ port);
} else {
debug("SRIOBOOT - MASTER: "
- "Port [ %d ] is ready, now release slave's core ...\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ "Port [ %d ] is ready, now release slave's core ...\n",
+ port);
/*
* configure outbound window
* with maintenance attribute to set slave's LCSBA1CSR
*/
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowtar, 0);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowtear, 0);
- if (CONFIG_SRIOBOOT_MASTER_PORT)
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ if (port - 1)
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowbar,
CONFIG_SYS_SRIO2_MEM_PHYS >> 12);
else
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowbar,
CONFIG_SYS_SRIO1_MEM_PHYS >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[1].rowar,
SRIO_OB_ATMU_AR_MAINT
| atmu_size_mask(SRIO_MAINT_WIN_SIZE));
@@ -223,27 +189,22 @@ void srio_boot_master_release_slave(void)
* configure outbound window
* with R/W attribute to set slave's BRR
*/
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowtar,
SRIO_LCSBA1CSR >> 9);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowtear, 0);
- if (CONFIG_SRIOBOOT_MASTER_PORT)
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ if (port - 1)
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowbar,
(CONFIG_SYS_SRIO2_MEM_PHYS
+ SRIO_MAINT_WIN_SIZE) >> 12);
else
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowbar,
(CONFIG_SYS_SRIO1_MEM_PHYS
+ SRIO_MAINT_WIN_SIZE) >> 12);
- out_be32((void *)&srio->atmu
- .port[CONFIG_SRIOBOOT_MASTER_PORT]
+ out_be32((void *)&srio->atmu.port[port - 1]
.outbw[2].rowar,
SRIO_OB_ATMU_AR_RW
| atmu_size_mask(SRIO_RW_WIN_SIZE));
@@ -252,7 +213,7 @@ void srio_boot_master_release_slave(void)
* Set the LCSBA1CSR register in slave
* by the maint-outbound window
*/
- if (CONFIG_SRIOBOOT_MASTER_PORT) {
+ if (port - 1) {
out_be32((void *)CONFIG_SYS_SRIO2_MEM_VIRT
+ SRIO_LCSBA1CSR_OFFSET,
SRIO_LCSBA1CSR);
@@ -289,8 +250,6 @@ void srio_boot_master_release_slave(void)
"Release slave successfully! Now the slave should start up!\n");
}
} else
- debug("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n",
- CONFIG_SRIOBOOT_MASTER_PORT);
+ debug("SRIOBOOT - MASTER: Port [ %d ] is not ready.\n", port);
}
#endif
-#endif
OpenPOWER on IntegriCloud