diff options
| author | york <yorksun@freescale.com> | 2010-07-02 22:25:55 +0000 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-26 13:16:10 -0500 |
| commit | 9490ff48648d969caeb70dbc6e506175f8699617 (patch) | |
| tree | 19d3caa8fa415392cb93e304c925a3dc5a58cbe5 /arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | |
| parent | 7fd101c97b58dab7b0bd87f30c3dedb0db21d15f (diff) | |
| download | talos-obmc-uboot-9490ff48648d969caeb70dbc6e506175f8699617.tar.gz talos-obmc-uboot-9490ff48648d969caeb70dbc6e506175f8699617.zip | |
powerpc/8xxx: Enable DDR3 RDIMM support
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c index d4199baa82..29cea53266 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c @@ -90,6 +90,7 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, { unsigned int retval; unsigned int mtb_ps; + int i; if (spd->mem_type) { if (spd->mem_type != SPD_MEMTYPE_DDR3) { @@ -131,8 +132,11 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd, case 0x01: /* RDIMM */ case 0x05: /* Mini-RDIMM */ pdimm->registered_dimm = 1; /* register buffered */ + for (i = 0; i < 16; i += 2) { + pdimm->rcw[i] = spd->mod_section.registered.rcw[i/2] & 0x0F; + pdimm->rcw[i+1] = (spd->mod_section.registered.rcw[i/2] >> 4) & 0x0F; + } break; - case 0x02: /* UDIMM */ case 0x03: /* SO-DIMM */ case 0x04: /* Micro-DIMM */ |
