diff options
| author | Alison Wang <b18965@freescale.com> | 2012-03-26 21:49:08 +0000 |
|---|---|---|
| committer | jason <jason@jason-ThinkPad-T61.(none)> | 2012-09-20 20:39:27 +0800 |
| commit | 198cafbf2cab9851ee5dd8d24d268d0ccc0fe3bd (patch) | |
| tree | a6fc11865887140e289ba28bc03f69f5388c8008 /arch/m68k/cpu/mcf5445x/interrupts.c | |
| parent | a4110eecf2944b2f8b47f38273cc3730ddd394a3 (diff) | |
| download | talos-obmc-uboot-198cafbf2cab9851ee5dd8d24d268d0ccc0fe3bd.tar.gz talos-obmc-uboot-198cafbf2cab9851ee5dd8d24d268d0ccc0fe3bd.zip | |
ColdFire: Clean up checkpatch warnings for MCF54451 and MCF54455
Signed-off-by: Alison Wang <b18965@freescale.com>
Diffstat (limited to 'arch/m68k/cpu/mcf5445x/interrupts.c')
| -rw-r--r-- | arch/m68k/cpu/mcf5445x/interrupts.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/m68k/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c index 85828a67b5..a2cf51933a 100644 --- a/arch/m68k/cpu/mcf5445x/interrupts.c +++ b/arch/m68k/cpu/mcf5445x/interrupts.c @@ -3,7 +3,7 @@ * (C) Copyright 2000-2004 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * * See file CREDITS for list of people who contributed to this @@ -28,14 +28,15 @@ /* CPU specific interrupt routine */ #include <common.h> #include <asm/immap.h> +#include <asm/io.h> int interrupt_init(void) { - volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); /* Make sure all interrupts are disabled */ - intp->imrh0 |= 0xFFFFFFFF; - intp->imrl0 |= 0xFFFFFFFF; + setbits_be32(&intp->imrh0, 0xffffffff); + setbits_be32(&intp->imrl0, 0xffffffff); enable_interrupts(); return 0; @@ -44,9 +45,9 @@ int interrupt_init(void) #if defined(CONFIG_MCFTMR) void dtimer_intr_setup(void) { - volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); + int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); - intp->icr0[CONFIG_SYS_TMRINTR_NO] = CONFIG_SYS_TMRINTR_PRI; - intp->imrh0 &= ~CONFIG_SYS_TMRINTR_MASK; + out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); + clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK); } #endif |
