omap4/5: Add support for booting with CH.

Configuration header(CH) is 512 byte header attached to an OMAP
boot image that will help ROM code to initialize clocks, SDRAM
etc and copy U-Boot directly into SDRAM. CH can help us in
by-passing SPL and directly boot U-boot, hence it's an alternative
for SPL. However, we intend to support both CH and SPL for OMAP4/5.

Initialization done through CH is limited and is not equivalent
to that done by SPL. So U-Boot has to distinguish between the
two cases and handle them accordingly. This patch takes care
of doing this.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

7 files changed, 62 insertions, 16 deletions

diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h
index ba52574157..c2a9b46cfd 100644
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -698,6 +698,7 @@ void setup_sri2c(void);
 void setup_post_dividers(u32 *const base, const struct dpll_params *params);
 u32 get_sys_clk_index(void);
 void enable_basic_clocks(void);
+void enable_basic_uboot_clocks(void);
 void enable_non_essential_clocks(void);
 void do_enable_clocks(u32 *const *clk_domains,
 		      u32 *const *clk_modules_hw_auto,
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 0ade8961ab..e9942574f2 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -191,5 +191,21 @@ struct control_lpddr2io_regs {
 #define DEV_DESC_PTR_OFFSET	0x4
 #define DEV_DATA_PTR_OFFSET	0x18
 #define BOOT_MODE_OFFSET	0x8
+#define RESET_REASON_OFFSET	0x9
+#define CH_FLAGS_OFFSET		0xA
 
+#define CH_FLAGS_CHSETTINGS	(0x1 << 0)
+#define CH_FLAGS_CHRAM		(0x1 << 1)
+#define CH_FLAGS_CHFLASH	(0x1 << 2)
+#define CH_FLAGS_CHMMCSD	(0x1 << 3)
+
+#ifndef __ASSEMBLY__
+struct omap_boot_parameters {
+	char *boot_message;
+	unsigned int mem_boot_descriptor;
+	unsigned char omap_bootdevice;
+	unsigned char reset_reason;
+	unsigned char ch_flags;
+};
+#endif
 #endif
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index b8113e15aa..4146e21818 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -55,6 +55,13 @@ u32 omap_sdram_size(void);
 u32 cortex_rev(void);
 void init_omap_revision(void);
 void do_io_settings(void);
+/*
+ * This is used to verify if the configuration header
+ * was executed by Romcode prior to control of transfer
+ * to the bootloader. SPL is responsible for saving and
+ * passing this to the u-boot.
+ */
+extern struct omap_boot_parameters boot_params;
 
 static inline u32 running_from_sdram(void)
 {
@@ -67,15 +74,17 @@ static inline u32 running_from_sdram(void)
 static inline u8 uboot_loaded_by_spl(void)
 {
 	/*
-	 * Configuration Header is not supported yet, so u-boot init running
-	 * from SDRAM implies that it was loaded by SPL. When this situation
-	 * changes one of these approaches could be taken:
-	 * i.  Pass a magic from SPL to U-Boot and U-Boot save it at a known
-	 *     location.
-	 * ii. Check the OPP. CH can support only 50% OPP while SPL initializes
-	 *     the DPLLs at 100% OPP.
+	 * u-boot can be running from sdram either because of configuration
+	 * Header or by SPL. If because of CH, then the romcode sets the
+	 * CHSETTINGS executed bit to true in the boot parameter structure that
+	 * it passes to the bootloader.This parameter is stored in the ch_flags
+	 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
+	 * mandatory section if CH is present.
 	 */
-	return running_from_sdram();
+	if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
+		return 0;
+	else
+		return running_from_sdram();
 }
 /*
  * The basic hardware init of OMAP(s_init()) can happen in 4
diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h
index edcc9e9364..fa99f654bd 100644
--- a/arch/arm/include/asm/arch-omap5/clocks.h
+++ b/arch/arm/include/asm/arch-omap5/clocks.h
@@ -708,6 +708,7 @@ void setup_post_dividers(u32 *const base, const struct dpll_params *params);
 u32 get_sys_clk_index(void);
 void enable_basic_clocks(void);
 void enable_non_essential_clocks(void);
+void enable_basic_uboot_clocks(void);
 void do_enable_clocks(u32 *const *clk_domains,
 		      u32 *const *clk_modules_hw_auto,
 		      u32 *const *clk_modules_explicit_en,
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 85975de2da..d811d6ec23 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -203,5 +203,21 @@ struct control_lpddr2io_regs {
 #define DEV_DESC_PTR_OFFSET	0x4
 #define DEV_DATA_PTR_OFFSET	0x18
 #define BOOT_MODE_OFFSET	0x8
+#define RESET_REASON_OFFSET     0x9
+#define CH_FLAGS_OFFSET         0xA
 
+#define CH_FLAGS_CHSETTINGS	(0x1 << 0)
+#define	CH_FLAGS_CHRAM		(0x1 << 1)
+#define CH_FLAGS_CHFLASH	(0x1 << 2)
+#define CH_FLAGS_CHMMCSD	(0x1 << 3)
+
+#ifndef __ASSEMBLY__
+struct omap_boot_parameters {
+	char *boot_message;
+	unsigned int mem_boot_descriptor;
+	unsigned char omap_bootdevice;
+	unsigned char reset_reason;
+	unsigned char ch_flags;
+};
+#endif /* __ASSEMBLY__ */
 #endif
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index 3803ea9f55..c31e18ca22 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -75,15 +75,17 @@ static inline u32 running_from_sdram(void)
 static inline u8 uboot_loaded_by_spl(void)
 {
 	/*
-	 * Configuration Header is not supported yet, so u-boot init running
-	 * from SDRAM implies that it was loaded by SPL. When this situation
-	 * changes one of these approaches could be taken:
-	 * i.  Pass a magic from SPL to U-Boot and U-Boot save it at a known
-	 *     location.
-	 * ii. Check the OPP. CH can support only 50% OPP while SPL initializes
-	 *     the DPLLs at 100% OPP.
+	 * u-boot can be running from sdram either because of configuration
+	 * Header or by SPL. If because of CH, then the romcode sets the
+	 * CHSETTINGS executed bit to true in the boot parameter structure that
+	 * it passes to the bootloader.This parameter is stored in the ch_flags
+	 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a
+	 * mandatory section if CH is present.
 	 */
-	return running_from_sdram();
+	if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS))
+		return 0;
+	else
+		return running_from_sdram();
 }
 /*
  * The basic hardware init of OMAP(s_init()) can happen in 4
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index f026805cd0..f1562ea4ab 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -80,6 +80,7 @@ struct spl_image_info {
 
 extern struct spl_image_info spl_image;
 
+extern u32* boot_params_ptr;
 u32 omap_boot_device(void);
 u32 omap_boot_mode(void);