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| author | Albert ARIBAUD \\(3ADEV\\) <albert.aribaud@3adev.fr> | 2015-09-21 22:43:37 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-10-02 10:42:31 +0200 |
| commit | 3f353ceccbbb25315cf7591f59f8dbd853b657e4 (patch) | |
| tree | e42fb1a71650b4be3515bf414b297bbc8176629c /arch/arm/include/asm/arch-vf610 | |
| parent | b9a1609915f68bad51b15cb12546723519a9be41 (diff) | |
| download | talos-obmc-uboot-3f353ceccbbb25315cf7591f59f8dbd853b657e4.tar.gz talos-obmc-uboot-3f353ceccbbb25315cf7591f59f8dbd853b657e4.zip | |
vf610: refactor DDRMC code
The VF610 DDRMC driver code contains settings which are
board-specific. Move these out to boards so that new boards
can define their own without having to modify the driver.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Diffstat (limited to 'arch/arm/include/asm/arch-vf610')
| -rw-r--r-- | arch/arm/include/asm/arch-vf610/ddrmc-vf610.h | 40 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-vf610/imx-regs.h | 6 |
2 files changed, 28 insertions, 18 deletions
diff --git a/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h b/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h index 6730cde1b8..9022c465a0 100644 --- a/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h +++ b/arch/arm/include/asm/arch-vf610/ddrmc-vf610.h @@ -11,18 +11,6 @@ #ifndef __ASM_ARCH_VF610_DDRMC_H #define __ASM_ARCH_VF610_DDRMC_H -struct ddrmc_lvl_info { - u16 wrlvl_reg_en; - u16 wrlvl_dl_0; - u16 wrlvl_dl_1; - u16 rdlvl_gt_reg_en; - u16 rdlvl_gt_dl_0; - u16 rdlvl_gt_dl_1; - u16 rdlvl_reg_en; - u16 rdlvl_dl_0; - u16 rdlvl_dl_1; -}; - struct ddr3_jedec_timings { u8 tinit; u32 trst_pwron; @@ -32,6 +20,7 @@ struct ddr3_jedec_timings { u8 trc; u8 trrd; u8 tccd; + u8 tbst_int_interval; u8 tfaw; u8 trp; u8 twtr; @@ -43,30 +32,51 @@ struct ddr3_jedec_timings { u8 tckesr; u8 tcke; u8 trcd_int; + u8 tras_lockout; u8 tdal; + u8 bstlen; u16 tdll; u8 trp_ab; u16 tref; u8 trfc; + u16 tref_int; u8 tpdex; u8 txpdll; u8 txsnr; u16 txsr; u8 cksrx; u8 cksre; + u8 freq_chg_en; u16 zqcl; u16 zqinit; u8 zqcs; u8 ref_per_zq; + u8 zqcs_rotate; u8 aprebit; + u8 cmd_age_cnt; + u8 age_cnt; + u8 q_fullness; + u8 odt_rd_mapcs0; + u8 odt_wr_mapcs0; u8 wlmrd; u8 wldqsen; }; -void ddrmc_setup_iomux(void); +struct ddrmc_cr_setting { + u32 setting; + int cr_rnum; /* CR register ; -1 for last entry */ +}; + +struct ddrmc_phy_setting { + u32 setting; + int phy_rnum; /* PHY register ; -1 for last entry */ +}; + +void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count); void ddrmc_phy_init(void); void ddrmc_ctrl_init_ddr3(struct ddr3_jedec_timings const *timings, - struct ddrmc_lvl_info *lvl, - int col_diff, int row_diff); + struct ddrmc_cr_setting *board_cr_settings, + struct ddrmc_phy_setting *board_phy_settings, + int col_diff, int row_diff); #endif diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index 436698588c..9758323433 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -148,7 +148,7 @@ #define DDRMC_CR18_TCKE(v) ((v) & 0x7) #define DDRMC_CR20_AP_EN (1 << 24) #define DDRMC_CR21_TRCD_INT(v) (((v) & 0xff) << 16) -#define DDRMC_CR21_TRAS_LOCKOUT (1 << 8) +#define DDRMC_CR21_TRAS_LOCKOUT(v) ((v) << 8) #define DDRMC_CR21_CCMAP_EN 1 #define DDRMC_CR22_TDAL(v) (((v) & 0x3f) << 16) #define DDRMC_CR23_BSTLEN(v) (((v) & 0x7) << 24) @@ -200,8 +200,8 @@ #define DDRMC_CR78_BUR_ON_FLY_BIT(v) ((v) & 0xf) #define DDRMC_CR79_CTLUPD_AREF(v) (((v) & 0x1) << 24) #define DDRMC_CR82_INT_MASK 0x10000000 -#define DDRMC_CR87_ODT_WR_MAPCS0 (1 << 24) -#define DDRMC_CR87_ODT_RD_MAPCS0 (1 << 16) +#define DDRMC_CR87_ODT_WR_MAPCS0(v) ((v) << 24) +#define DDRMC_CR87_ODT_RD_MAPCS0(v) ((v) << 16) #define DDRMC_CR88_TODTL_CMD(v) (((v) & 0x1f) << 16) #define DDRMC_CR89_AODT_RWSMCS(v) ((v) & 0xf) #define DDRMC_CR91_R2W_SMCSDL(v) (((v) & 0x7) << 16) |
