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authorThierry Reding <treding@nvidia.com>2014-12-09 22:25:07 -0700
committerTom Warren <twarren@nvidia.com>2014-12-18 13:19:20 -0700
commit59cb3bf4c6d87448b4fb4e0fd386ac6d170a19b6 (patch)
tree6012fd94ef7090a2969775c6e72c9db265aeb2a1 /arch/arm/include/asm/arch-tegra124/powergate.h
parenta7230745504552095594362b81caaa33b5d7da5e (diff)
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ARM: tegra: Provide PCIEXCLK reset ID
This reset is required for PCIe and the corresponding ID therefore needs to be defined. The enumeration value for this was properly defined on some SoCs but not on others. Similarly, some contained it in the mapping of peripheral IDs to clock IDs, other didn't. This patch defines it consistently for all supported SoC generations. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra124/powergate.h')
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