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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2015-07-19 22:19:46 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-07-27 15:02:14 -0400 |
| commit | 089fddfde2cb360ac2d040166301d5ce7af8314e (patch) | |
| tree | 20197d42c8a726023a283499361ab83708db5896 /arch/arm/include/asm/arch-stm32f4/stm32.h | |
| parent | b0c8f4a7972ea114654a9bac88fd458f2e2e8636 (diff) | |
| download | talos-obmc-uboot-089fddfde2cb360ac2d040166301d5ce7af8314e.tar.gz talos-obmc-uboot-089fddfde2cb360ac2d040166301d5ce7af8314e.zip | |
stm32f429: pass the device unique ID in DTB
Read device unique ID and set environment variable "serial#".
Value would then be passed to kernel through DTB.
To read ID from DTB, kernel is required to have commit:
3f599875e5202986b350618a617527ab441bf206 (ARM: 8355/1: arch: Show
the serial number from devicetree in cpuinfo)
This commit is already mainline since v4.1-rc1.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: Albert Aribaud <albert.u.boot@aribaud.net>
To: Tom Rini <trini@konsulko.com>
To: Kamil Lulko <rev13@wp.pl>
Cc: u-boot@lists.denx.de
Diffstat (limited to 'arch/arm/include/asm/arch-stm32f4/stm32.h')
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f4/stm32.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h index a9f88db560..3ed3801dfe 100644 --- a/arch/arm/include/asm/arch-stm32f4/stm32.h +++ b/arch/arm/include/asm/arch-stm32f4/stm32.h @@ -14,6 +14,7 @@ /* * Peripheral memory map */ +#define STM32_SYSMEM_BASE 0x1FFF0000 #define STM32_PERIPH_BASE 0x40000000 #define STM32_APB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00000000) #define STM32_APB2PERIPH_BASE (STM32_PERIPH_BASE + 0x00010000) @@ -25,6 +26,12 @@ /* * Register maps */ +struct stm32_u_id_regs { + u32 u_id_low; + u32 u_id_mid; + u32 u_id_high; +}; + struct stm32_rcc_regs { u32 cr; /* RCC clock control */ u32 pllcfgr; /* RCC PLL configuration */ @@ -78,6 +85,9 @@ struct stm32_flash_regs { /* * Registers access macros */ +#define STM32_U_ID_BASE (STM32_SYSMEM_BASE + 0x7A10) +#define STM32_U_ID ((struct stm32_u_id_regs *)STM32_U_ID_BASE) + #define STM32_RCC_BASE (STM32_AHB1PERIPH_BASE + 0x3800) #define STM32_RCC ((struct stm32_rcc_regs *)STM32_RCC_BASE) |
