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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-24 11:45:06 +0900 |
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committer | Tom Rini <trini@ti.com> | 2015-02-24 17:07:03 -0500 |
commit | 346cfba4f013c34e1dc16948d1ed89dc8c44c478 (patch) | |
tree | 44d2e39af9c92dd4266e3a0f210979f3e145fd13 /arch/arm/include/asm/arch-pantheon/pantheon.h | |
parent | 41fbbbbc71161e0c0479d7c6c5598e760d70f624 (diff) | |
download | talos-obmc-uboot-346cfba4f013c34e1dc16948d1ed89dc8c44c478.tar.gz talos-obmc-uboot-346cfba4f013c34e1dc16948d1ed89dc8c44c478.zip |
ARM: remove dkb board support
This is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Lei Wen <leiwen@marvell.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-pantheon/pantheon.h')
-rw-r--r-- | arch/arm/include/asm/arch-pantheon/pantheon.h | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/arch/arm/include/asm/arch-pantheon/pantheon.h b/arch/arm/include/asm/arch-pantheon/pantheon.h deleted file mode 100644 index c3a71bfce4..0000000000 --- a/arch/arm/include/asm/arch-pantheon/pantheon.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2011 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Lei Wen <leiwen@marvell.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _PANTHEON_H -#define _PANTHEON_H - -/* Common APB clock register bit definitions */ -#define APBC_APBCLK (1<<0) /* APB Bus Clock Enable */ -#define APBC_FNCLK (1<<1) /* Functional Clock Enable */ -#define APBC_RST (1<<2) /* Reset Generation */ -/* Functional Clock Selection Mask */ -#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4) - -/* Common APMU register bit definitions */ -#define APMU_PERI_CLK (1<<4) /* Peripheral Clock Enable */ -#define APMU_AXI_CLK (1<<3) /* AXI Clock Enable*/ -#define APMU_PERI_RST (1<<1) /* Peripheral Reset */ -#define APMU_AXI_RST (1<<0) /* AXI Reset */ - -/* Register Base Addresses */ -#define PANTHEON_DRAM_BASE 0xB0000000 -#define PANTHEON_TIMER_BASE 0xD4014000 -#define PANTHEON_WD_TIMER_BASE 0xD4080000 -#define PANTHEON_APBC_BASE 0xD4015000 -#define PANTHEON_UART1_BASE 0xD4017000 -#define PANTHEON_UART2_BASE 0xD4018000 -#define PANTHEON_GPIO_BASE 0xD4019000 -#define PANTHEON_MFPR_BASE 0xD401E000 -#define PANTHEON_MPMU_BASE 0xD4050000 -#define PANTHEON_APMU_BASE 0xD4282800 -#define PANTHEON_CPU_BASE 0xD4282C00 - -#endif /* _PANTHEON_H */ |