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authorNishanth Menon <nm@ti.com>2013-05-30 03:19:31 +0000
committerTom Rini <trini@ti.com>2013-06-10 08:43:10 -0400
commit18c9d55ac611784d161440bb9f127e372e132856 (patch)
tree85e31364c96bdd69d1d582cf05d8b29da0d6cd84 /arch/arm/include/asm/arch-omap4/cpu.h
parent3332b244214d63dcf347fefb700fd71becb4b46e (diff)
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ARM: OMAP5: DRA7xx: support class 0 optimized voltages
DRA752 now uses AVS Class 0 voltages which are voltages in efuse. This means that we can now use the optimized voltages which are stored as mV values in efuse and program PMIC accordingly. This allows us to go with higher OPP as needed in the system without the need for implementing complex AVS logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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