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authorSricharan R <r.sricharan@ti.com>2013-05-30 03:19:34 +0000
committerTom Rini <trini@ti.com>2013-06-10 08:43:10 -0400
commitf9b814a8e99390d19628bc1b67c9567fc485d918 (patch)
tree791ab819ecdd0bcb956b12a6004a0d5b63aa2601 /arch/arm/include/asm/arch-omap4/clock.h
parent378bd1fb4e965a10b396140e964740c76c960c70 (diff)
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ARM: DRA7xx: Correct the SYS_CLK to 20MHZ
The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap4/clock.h')
-rw-r--r--arch/arm/include/asm/arch-omap4/clock.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h
index f544edfbd0..d7b61c298a 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -214,6 +214,10 @@
#define DPLL_NO_LOCK 0
#define DPLL_LOCK 1
+/* Clock Defines */
+#define V_OSCK 38400000 /* Clock output from T2 */
+#define V_SCLK V_OSCK
+
struct omap4_scrm_regs {
u32 revision; /* 0x0000 */
u32 pad00[63];
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