diff options
| author | Helmut Raiger <helmut.raiger@hale.at> | 2012-01-11 03:59:22 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 10:11:26 +0100 |
| commit | fa47a28661719ec73479c96b12823fd4e7373314 (patch) | |
| tree | c04bb76672f1973f83a54467f35ed893d3066d3c /arch/arm/include/asm/arch-mx31/imx-regs.h | |
| parent | 2af81e2735bb50a679dd84d54e821b1b2f1c56e3 (diff) | |
| download | talos-obmc-uboot-fa47a28661719ec73479c96b12823fd4e7373314.tar.gz talos-obmc-uboot-fa47a28661719ec73479c96b12823fd4e7373314.zip | |
mmc: access mxcmmc from mx31 boards
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided. Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx31/imx-regs.h')
| -rw-r--r-- | arch/arm/include/asm/arch-mx31/imx-regs.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 6a517ddd93..798cc74672 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -709,6 +709,13 @@ struct esdc_regs { #define MUX_CTL_CSPI3_SPI_RDY 0x0e #define MUX_CTL_CSPI3_MOSI 0x13 +#define MUX_CTL_SD1_DATA1 0x18 +#define MUX_CTL_SD1_DATA2 0x19 +#define MUX_CTL_SD1_DATA3 0x1a +#define MUX_CTL_SD1_CMD 0x1d +#define MUX_CTL_SD1_CLK 0x1e +#define MUX_CTL_SD1_DATA0 0x1f + #define MUX_CTL_USBH2_DATA1 0x40 #define MUX_CTL_USBH2_DIR 0x44 #define MUX_CTL_USBH2_STP 0x45 @@ -855,6 +862,10 @@ struct esdc_regs { */ #define NFC_BASE_ADDR 0xB8000000 +/* SD card controller */ +#define SDHC1_BASE_ADDR 0x50004000 +#define SDHC2_BASE_ADDR 0x50008000 + /* * Internal RAM (16KB) */ |
