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| author | Alex Porosanu <alexandru.porosanu@freescale.com> | 2016-04-29 15:17:58 +0300 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-05-18 08:51:46 -0700 |
| commit | e99d7193593cf6331ea04cd394a9a4cf18886ef0 (patch) | |
| tree | a187ad9403f8e304c9dd954aec3a8aad51557e08 /arch/arm/include/asm/arch-ls102xa/config.h | |
| parent | 56747bfdbd6f2c5bc391d0c9d5eb20a6a2d50505 (diff) | |
| download | talos-obmc-uboot-e99d7193593cf6331ea04cd394a9a4cf18886ef0.tar.gz talos-obmc-uboot-e99d7193593cf6331ea04cd394a9a4cf18886ef0.zip | |
arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-ls102xa/config.h')
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/config.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 267bd17727..92f30e28aa 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -40,6 +40,7 @@ (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) #define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 +#define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000 #define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000 #define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 #define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 |
