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authorTom Rini <trini@ti.com>2014-07-29 09:41:35 -0400
committerTom Rini <trini@ti.com>2014-07-29 09:41:35 -0400
commit362f16b1e9e94024a511adae9977d145ef942b50 (patch)
treee0e359fb074493fa8deab65abe0feb4b8fefde3a /arch/arm/include/asm/arch-keystone/clock-k2hk.h
parent302e609fe653baf1ae3a7573d2f4eafd86ab696b (diff)
parent9d195a546179bc732aba9eacccf0a9a3db591288 (diff)
downloadtalos-obmc-uboot-362f16b1e9e94024a511adae9977d145ef942b50.tar.gz
talos-obmc-uboot-362f16b1e9e94024a511adae9977d145ef942b50.zip
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-keystone/clock-k2hk.h')
-rw-r--r--arch/arm/include/asm/arch-keystone/clock-k2hk.h23
1 files changed, 1 insertions, 22 deletions
diff --git a/arch/arm/include/asm/arch-keystone/clock-k2hk.h b/arch/arm/include/asm/arch-keystone/clock-k2hk.h
index 6a69a8d2be..784a0be567 100644
--- a/arch/arm/include/asm/arch-keystone/clock-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/clock-k2hk.h
@@ -10,10 +10,6 @@
#ifndef __ASM_ARCH_CLOCK_K2HK_H
#define __ASM_ARCH_CLOCK_K2HK_H
-#include <asm/arch/hardware.h>
-
-#ifndef __ASSEMBLY__
-
enum ext_clk_e {
sys_clk,
alt_core_clk,
@@ -56,7 +52,7 @@ enum clk_e {
sys_clk3_clk
};
-#define K2HK_CLK1_6 sys_clk0_6_clk
+#define KS2_CLK1_6 sys_clk0_6_clk
/* PLL identifiers */
enum pll_type_e {
@@ -66,15 +62,6 @@ enum pll_type_e {
DDR3A_PLL,
DDR3B_PLL,
};
-#define MAIN_PLL CORE_PLL
-
-/* PLL configuration data */
-struct pll_init_data {
- int pll;
- int pll_m; /* PLL Multiplier */
- int pll_d; /* PLL divider */
- int pll_od; /* PLL output divider */
-};
#define CORE_PLL_799 {CORE_PLL, 13, 1, 2}
#define CORE_PLL_983 {CORE_PLL, 16, 1, 2}
@@ -98,12 +85,4 @@ struct pll_init_data {
#define DDR3_PLL_800(x) {DDR3##x##_PLL, 16, 1, 2}
#define DDR3_PLL_333(x) {DDR3##x##_PLL, 20, 1, 6}
-void init_plls(int num_pll, struct pll_init_data *config);
-void init_pll(const struct pll_init_data *data);
-unsigned long clk_get_rate(unsigned int clk);
-unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
-int clk_set_rate(unsigned int clk, unsigned long hz);
-
-#endif
-
#endif
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