diff options
| author | Dave Gerlach <d-gerlach@ti.com> | 2014-02-10 11:41:49 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-02-21 13:55:40 -0500 |
| commit | cd8341b7eb7bcf630a49538684778d87daef3e61 (patch) | |
| tree | b0a0047ef60d2ba09ac17210034d51846a3d8691 /arch/arm/include/asm/arch-am33xx | |
| parent | 072cefe07d54879816d0f17830f28198af4c2727 (diff) | |
| download | talos-obmc-uboot-cd8341b7eb7bcf630a49538684778d87daef3e61.tar.gz talos-obmc-uboot-cd8341b7eb7bcf630a49538684778d87daef3e61.zip | |
ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx')
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/cpu.h | 6 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-am33xx/gpio.h | 4 |
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 248dc4d4fc..97e8702488 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -353,7 +353,11 @@ struct cm_perpll { unsigned int gpio2clkctrl; /* offset 0x480 */ unsigned int resv20; unsigned int gpio3clkctrl; /* offset 0x488 */ - unsigned int resv21[7]; + unsigned int resv41; + unsigned int gpio4clkctrl; /* offset 0x490 */ + unsigned int resv42; + unsigned int gpio5clkctrl; /* offset 0x498 */ + unsigned int resv21[3]; unsigned int i2c1clkctrl; /* offset 0x4A8 */ unsigned int resv22; diff --git a/arch/arm/include/asm/arch-am33xx/gpio.h b/arch/arm/include/asm/arch-am33xx/gpio.h index a1ffd49f79..220603db5a 100644 --- a/arch/arm/include/asm/arch-am33xx/gpio.h +++ b/arch/arm/include/asm/arch-am33xx/gpio.h @@ -12,8 +12,8 @@ #define AM33XX_GPIO1_BASE 0x4804C000 #define AM33XX_GPIO2_BASE 0x481AC000 #define AM33XX_GPIO3_BASE 0x481AE000 - -#define GPIO_22 22 +#define AM33XX_GPIO4_BASE 0x48320000 +#define AM33XX_GPIO5_BASE 0x48322000 /* GPIO CTRL register */ #define GPIO_CTRL_DISABLEMODULE_SHIFT 0 |
