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authorLokesh Vutla <lokeshvutla@ti.com>2013-07-30 11:36:28 +0530
committerTom Rini <trini@ti.com>2013-08-15 08:51:10 -0400
commitc06e498a16eae82eda3a6947c2375990df20bd3a (patch)
tree4e14dc3e1724b3a08d3ed2a16dbdd1ed0d7c10d7 /arch/arm/include/asm/arch-am33xx/omap.h
parentfbf2728da300a96b2e2a6ba6b266bc80c8c21160 (diff)
downloadtalos-obmc-uboot-c06e498a16eae82eda3a6947c2375990df20bd3a.tar.gz
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ARM: AM43xx: Add header files
Adding the following data: -> Prcm structure -> Base addresses -> Pin mux structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx/omap.h')
-rw-r--r--arch/arm/include/asm/arch-am33xx/omap.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h
index 66c61e54f4..d54cf5e1bb 100644
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -15,11 +15,6 @@
#ifndef _OMAP_H_
#define _OMAP_H_
-/*
- * Non-secure SRAM Addresses
- * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
- * at 0x40304000(EMU base) so that our code works for both EMU and GP
- */
#ifdef CONFIG_AM33XX
#define NON_SECURE_SRAM_START 0x402F0400
#define NON_SECURE_SRAM_END 0x40310000
@@ -28,5 +23,9 @@
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40320000
#define SRAM_SCRATCH_SPACE_ADDR 0x4031B800
+#elif defined(CONFIG_AM43XX)
+#define NON_SECURE_SRAM_START 0x402F0400
+#define NON_SECURE_SRAM_END 0x40340000
+#define SRAM_SCRATCH_SPACE_ADDR 0x4033C000
#endif
#endif
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