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| author | Peng Fan <van.freenix@gmail.com> | 2016-05-23 18:35:56 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-05-24 14:59:56 +0200 |
| commit | 27cd0da41e7c2f10d754efba0d178a5715d12bc2 (patch) | |
| tree | 360773817cd643aff1da3e339542f53f9a908249 /arch/arm/imx-common/hab.c | |
| parent | 003f0c7eb2f257eddc5173def53fcb5a137045c2 (diff) | |
| download | talos-obmc-uboot-27cd0da41e7c2f10d754efba0d178a5715d12bc2.tar.gz talos-obmc-uboot-27cd0da41e7c2f10d754efba0d178a5715d12bc2.zip | |
imx-common: use simpler runtime cpu dection macros
Use simpler runtime cpu dection macros.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
Diffstat (limited to 'arch/arm/imx-common/hab.c')
| -rw-r--r-- | arch/arm/imx-common/hab.c | 48 |
1 files changed, 13 insertions, 35 deletions
diff --git a/arch/arm/imx-common/hab.c b/arch/arm/imx-common/hab.c index 1e4ed7ecd8..a980688338 100644 --- a/arch/arm/imx-common/hab.c +++ b/arch/arm/imx-common/hab.c @@ -17,65 +17,45 @@ #define hab_rvt_report_event_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \ ) #define hab_rvt_report_status_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \ ) #define hab_rvt_authenticate_image_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \ ) #define hab_rvt_entry_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \ ) #define hab_rvt_exit_p \ ( \ - ((is_cpu_type(MXC_CPU_MX6Q) || \ - is_cpu_type(MXC_CPU_MX6D)) && \ - (soc_rev() >= CHIP_REV_1_5)) ? \ + (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ - ((is_cpu_type(MXC_CPU_MX6DL) || \ - is_cpu_type(MXC_CPU_MX6SOLO)) && \ - (soc_rev() >= CHIP_REV_1_2)) ? \ + (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ ((hab_rvt_exit_t *)HAB_RVT_EXIT) \ ) @@ -429,8 +409,7 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size) */ /* Check MMU enabled */ if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) { - if (is_cpu_type(MXC_CPU_MX6Q) || - is_cpu_type(MXC_CPU_MX6D)) { + if (is_mx6dq()) { /* * This won't work on Rev 1.0.0 of * i.MX6Q/D, since their ROM doesn't @@ -439,10 +418,9 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size) */ if (!is_mx6dqp()) writel(1, MX6DQ_PU_IROM_MMU_EN_VAR); - } else if (is_cpu_type(MXC_CPU_MX6DL) || - is_cpu_type(MXC_CPU_MX6SOLO)) { + } else if (is_mx6sdl()) { writel(1, MX6DLS_PU_IROM_MMU_EN_VAR); - } else if (is_cpu_type(MXC_CPU_MX6SL)) { + } else if (is_mx6sl()) { writel(1, MX6SL_PU_IROM_MMU_EN_VAR); } } |
