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| author | Simon Glass <sjg@chromium.org> | 2016-01-21 19:45:17 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-01-21 20:42:37 -0700 |
| commit | dae594f2105b08ce76aa6b3b02433abb0796be51 (patch) | |
| tree | b4245d9043e7cadd9df635c7807ed6dcb3df3240 /arch/arm/dts | |
| parent | 318922b30fd0f255a72d7ccd7d7fd58dfb5feb2e (diff) | |
| download | talos-obmc-uboot-dae594f2105b08ce76aa6b3b02433abb0796be51.tar.gz talos-obmc-uboot-dae594f2105b08ce76aa6b3b02433abb0796be51.zip | |
rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/rk3288-veyron.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi index c201e855de..421d21290c 100644 --- a/arch/arm/dts/rk3288-veyron.dtsi +++ b/arch/arm/dts/rk3288-veyron.dtsi @@ -332,6 +332,7 @@ clock-frequency = <400000>; i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */ i2c-scl-rising-time-ns = <100>; /* 45ns measured */ + u-boot,dm-pre-reloc; rk808: pmic@1b { compatible = "rockchip,rk808"; @@ -344,6 +345,7 @@ rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; + u-boot,dm-pre-reloc; vcc1-supply = <&vcc33_sys>; vcc2-supply = <&vcc33_sys>; |
