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| author | Chin Liang See <clsee@altera.com> | 2015-11-26 09:44:11 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-11-30 13:30:19 +0100 |
| commit | 271e9ecd72d104d0faea744d23380d1e1b7698b1 (patch) | |
| tree | 6683b564c08cf7534146210e286a4d67c1750b62 /arch/arm/dts/socfpga_cyclone5.dtsi | |
| parent | 9a41404dc610c639e94e839208895fb6967741ac (diff) | |
| download | talos-obmc-uboot-271e9ecd72d104d0faea744d23380d1e1b7698b1.tar.gz talos-obmc-uboot-271e9ecd72d104d0faea744d23380d1e1b7698b1.zip | |
arm: socfpga: dts: Adding drvsel and smplsel to dts
Adding new node drvsel and smplsel for SDMMC
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'arch/arm/dts/socfpga_cyclone5.dtsi')
| -rw-r--r-- | arch/arm/dts/socfpga_cyclone5.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi index de362099db..040b236211 100644 --- a/arch/arm/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/dts/socfpga_cyclone5.dtsi @@ -25,6 +25,8 @@ bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; + drvsel = <3>; + smplsel = <0>; }; sysmgr@ffd08000 { |
