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| author | Simon Glass <sjg@chromium.org> | 2015-01-05 20:05:42 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-01-29 17:09:53 -0700 |
| commit | 6f755eb66bbbdf1186b3aaae245ac9fc255def46 (patch) | |
| tree | 30d1bfb933e7165645cba4afc9db8594019c57e6 /arch/arm/dts/exynos5800-peach-pi.dts | |
| parent | 2b2b50bc8748bf1ddb2d96da7157f9eecbe24961 (diff) | |
| download | talos-obmc-uboot-6f755eb66bbbdf1186b3aaae245ac9fc255def46.tar.gz talos-obmc-uboot-6f755eb66bbbdf1186b3aaae245ac9fc255def46.zip | |
dm: exynos: dts: Use GPIO bank phandles for GPIOs
U-Boot now supports using GPIOs using bank phandles instead of global
numbers. Update the exynos device tree files to use this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/dts/exynos5800-peach-pi.dts')
| -rw-r--r-- | arch/arm/dts/exynos5800-peach-pi.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts index e7c380f83b..e4bc100995 100644 --- a/arch/arm/dts/exynos5800-peach-pi.dts +++ b/arch/arm/dts/exynos5800-peach-pi.dts @@ -17,7 +17,7 @@ "google,peach", "samsung,exynos5800", "samsung,exynos5"; config { - google,bad-wake-gpios = <&gpio 0x56 0>; /* gpx0-6 */ + google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; hwid = "PIT TEST A-A 7848"; lazy-init = <1>; }; @@ -32,7 +32,7 @@ mem-manuf = "samsung"; mem-type = "ddr3"; clock-frequency = <800000000>; - arm-frequency = <1700000000>; + arm-frequency = <900000000>; }; tmu@10060000 { @@ -102,7 +102,7 @@ spi-half-duplex; spi-max-timeout-ms = <1100>; spi-frame-header = <0xec>; - ec-interrupt = <&gpio 93 1>; /* GPX1_5 */ + ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>; /* * This describes the flash memory within the EC. Note @@ -118,11 +118,11 @@ }; xhci@12000000 { - samsung,vbus-gpio = <&gpio 0x40 0>; /* H00 */ + samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>; }; xhci@12400000 { - samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */ + samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>; }; fimd@14400000 { |
