path: root/arch/arm/cpu/armv8/fsl-lsch3
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authorScott Wood <>2015-03-24 13:25:03 -0700
committerYork Sun <>2015-04-23 16:46:51 -0700
commit32eda7cc945212ba8df569e399b0361b32676ac2 (patch)
treef6732141f3a400acae5645e04dd3eb6a2a4d0fed /arch/arm/cpu/armv8/fsl-lsch3
parent548cf52fd5be1a490807c2f8e5f218c9fbd4053a (diff)
armv8/ls2085ardb: Enable NAND SPL support
Enable NAND boot support using SPL framework. To boot from NAND, either use DIP switches on board, or "qixis_reset nand" command. Details of forming NAND image can be found in README. Signed-off-by: Scott Wood <> [York Sun: Remove +S from defconfig after commit 252ed872] Signed-off-by: York Sun <>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-lsch3')
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/README b/arch/arm/cpu/armv8/fsl-lsch3/README
index 15a1549e56..37f07fbb76 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/README
+++ b/arch/arm/cpu/armv8/fsl-lsch3/README
@@ -133,3 +133,16 @@ The u-boot image should be written to match SRC_ADDR, in above example 0x20000.
nand write <u-boot image in memory> 200000 <size of u-boot image>
With these two images in NAND device, the board can boot from NAND.
+Another example for RDB boards,
+1) CCSR 4-byte write to 0x00e00404, data=0x00000000
+2) CCSR 4-byte write to 0x00e00400, data=0x1800a000
+3) Block Copy: SRC=0x0119, SRC_ADDR=0x00080000, DEST_ADDR=0x1800a000,
+nand write <rcw image in memory> 0 <size of rcw image>
+nand write <u-boot image in memory> 80000 <size of u-boot image>
+Notice the difference from QDS is SRC, SRC_ADDR and the offset of u-boot image
+to match board NAND device with 4KB/page, block size 512KB.
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