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| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-03-30 17:01:08 -0500 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-04-21 12:23:16 +0200 |
| commit | 37ef0c70d32c8115bbbb508680fcb65004849126 (patch) | |
| tree | 5d897e22c1bf83feb574dcea3778306be74991cb /arch/arm/cpu/armv7/socfpga/spl.c | |
| parent | 08e463ee8a7a5641e191be2a8e934d8284d1ca55 (diff) | |
| download | talos-obmc-uboot-37ef0c70d32c8115bbbb508680fcb65004849126.tar.gz talos-obmc-uboot-37ef0c70d32c8115bbbb508680fcb65004849126.zip | |
arm: socfpga: spl: add sdram init and calibration
Add a call to checkboard along with sdram intilialization and calibration.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/cpu/armv7/socfpga/spl.c')
| -rw-r--r-- | arch/arm/cpu/armv7/socfpga/spl.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c index 787ad7fb0d..756c55af91 100644 --- a/arch/arm/cpu/armv7/socfpga/spl.c +++ b/arch/arm/cpu/armv7/socfpga/spl.c @@ -15,6 +15,7 @@ #include <asm/arch/freeze_controller.h> #include <asm/arch/clock_manager.h> #include <asm/arch/scan_manager.h> +#include <asm/arch/sdram.h> DECLARE_GLOBAL_DATA_PTR; @@ -174,4 +175,16 @@ void spl_board_init(void) /* enable console uart printing */ preloader_console_init(); + + if (sdram_mmr_init_full(0xffffffff) != 0) { + puts("SDRAM init failed.\n"); + hang(); + } + + debug("SDRAM: Calibrating PHY\n"); + /* SDRAM calibration */ + if (sdram_calibration_full() == 0) { + puts("SDRAM calibration failed.\n"); + hang(); + } } |
