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| author | Mugunthan V N <mugunthanvnm@ti.com> | 2013-07-08 16:04:40 +0530 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-07-26 16:39:11 -0400 |
| commit | f986d9720836433ded29f06c8f5aed462bd20924 (patch) | |
| tree | 23056ff782102e41e96ff70b0209fdd5161e589a /arch/arm/cpu/armv7/omap5/prcm-regs.c | |
| parent | 65e9d56fb9ce9cfd7ffff7afaa6b7de50e400e06 (diff) | |
| download | talos-obmc-uboot-f986d9720836433ded29f06c8f5aed462bd20924.tar.gz talos-obmc-uboot-f986d9720836433ded29f06c8f5aed462bd20924.zip | |
ARM: DRA7xx: Enable GMAC clock control
Enabling CPSW module by enabling GMAC clock control
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap5/prcm-regs.c')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/prcm-regs.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index b0416ad9a3..9dfeff9d50 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -896,6 +896,8 @@ struct prcm_regs const dra7xx_prcm = { .cm_l3init_hsusbhost_clkctrl = 0x4a009340, .cm_l3init_hsusbotg_clkctrl = 0x4a009348, .cm_l3init_hsusbtll_clkctrl = 0x4a009350, + .cm_gmac_clkstctrl = 0x4a0093c0, + .cm_gmac_gmac_clkctrl = 0x4a0093d0, .cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0, /* cm2.l4per */ |
