summaryrefslogtreecommitdiffstats
path: root/arch/arm/cpu/armv7/am33xx/emif4.c
diff options
context:
space:
mode:
authorMatt Porter <mporter@ti.com>2013-03-15 10:07:03 +0000
committerTom Rini <trini@ti.com>2013-03-24 12:49:11 -0400
commit3ba65f97cbedb39fb486f42f8daa9b9e0d36705a (patch)
tree0349f033250c48a61c82a6c3bc5bf85ad220c6c1 /arch/arm/cpu/armv7/am33xx/emif4.c
parent81df2bab46d3bed319e21571c68db8e0a048bbfd (diff)
downloadtalos-obmc-uboot-3ba65f97cbedb39fb486f42f8daa9b9e0d36705a.tar.gz
talos-obmc-uboot-3ba65f97cbedb39fb486f42f8daa9b9e0d36705a.zip
am33xx: refactor emif4/ddr to support multiple EMIF instances
The AM33xx emif4/ddr support closely matches what is need to support TI814x except that TI814x has two EMIF instances. Refactor all the emif4 helper calls and the config_ddr() init function to use an additional instance number argument. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/emif4.c')
-rw-r--r--arch/arm/cpu/armv7/am33xx/emif4.c40
1 files changed, 22 insertions, 18 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 01e3a5204e..76459d81f9 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -44,44 +44,48 @@ void dram_init_banksize(void)
#ifdef CONFIG_SPL_BUILD
-static struct vtp_reg *vtpreg = (struct vtp_reg *)VTP0_CTRL_ADDR;
+static struct vtp_reg *vtpreg[2] = {
+ (struct vtp_reg *)VTP0_CTRL_ADDR,
+ (struct vtp_reg *)VTP1_CTRL_ADDR};
+#ifdef CONFIG_AM33XX
static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
+#endif
-static void config_vtp(void)
+static void config_vtp(int nr)
{
- writel(readl(&vtpreg->vtp0ctrlreg) | VTP_CTRL_ENABLE,
- &vtpreg->vtp0ctrlreg);
- writel(readl(&vtpreg->vtp0ctrlreg) & (~VTP_CTRL_START_EN),
- &vtpreg->vtp0ctrlreg);
- writel(readl(&vtpreg->vtp0ctrlreg) | VTP_CTRL_START_EN,
- &vtpreg->vtp0ctrlreg);
+ writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE,
+ &vtpreg[nr]->vtp0ctrlreg);
+ writel(readl(&vtpreg[nr]->vtp0ctrlreg) & (~VTP_CTRL_START_EN),
+ &vtpreg[nr]->vtp0ctrlreg);
+ writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_START_EN,
+ &vtpreg[nr]->vtp0ctrlreg);
/* Poll for READY */
- while ((readl(&vtpreg->vtp0ctrlreg) & VTP_CTRL_READY) !=
+ while ((readl(&vtpreg[nr]->vtp0ctrlreg) & VTP_CTRL_READY) !=
VTP_CTRL_READY)
;
}
void config_ddr(unsigned int pll, unsigned int ioctrl,
const struct ddr_data *data, const struct cmd_control *ctrl,
- const struct emif_regs *regs)
+ const struct emif_regs *regs, int nr)
{
enable_emif_clocks();
ddr_pll_config(pll);
- config_vtp();
- config_cmd_ctrl(ctrl);
-
- config_ddr_data(0, data);
- config_ddr_data(1, data);
+ config_vtp(nr);
+ config_cmd_ctrl(ctrl, nr);
+ config_ddr_data(data, nr);
+#ifdef CONFIG_AM33XX
config_io_ctrl(ioctrl);
/* Set CKE to be controlled by EMIF/DDR PHY */
writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
+#endif
/* Program EMIF instance */
- config_ddr_phy(regs);
- set_sdram_timings(regs);
- config_sdram(regs);
+ config_ddr_phy(regs, nr);
+ set_sdram_timings(regs, nr);
+ config_sdram(regs, nr);
}
#endif
OpenPOWER on IntegriCloud