diff options
| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-23 18:06:40 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-11-10 15:03:48 +0100 |
| commit | 62e92077a8936e60087d55683538ee386cc673aa (patch) | |
| tree | 98bf9f9796ab466ad1bff97c7672d5c3159526d3 /arch/arm/cpu/arm926ejs | |
| parent | bf104ffa2594e5bf14ef2d5ac2711084c763ef77 (diff) | |
| download | talos-obmc-uboot-62e92077a8936e60087d55683538ee386cc673aa.tar.gz talos-obmc-uboot-62e92077a8936e60087d55683538ee386cc673aa.zip | |
arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD
When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD,
some files fail to build, most of the time because they include
mcr instructions, which only exist for Thumb-2.
This patch introduces a Kconfig option CONFIG_THUMB2 and uses
it to select between Thumb-2 and ARM mode for the aforementioned
files.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/Makefile | 11 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/cache.c | 5 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index 63fa159db6..fe78922170 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -20,3 +20,14 @@ obj-$(CONFIG_MX25) += mx25/ obj-$(CONFIG_MX27) += mx27/ obj-$(if $(filter mxs,$(SOC)),y) += mxs/ obj-$(if $(filter spear,$(SOC)),y) += spear/ + +# some files can only build in ARM or THUMB2, not THUMB1 + +ifdef CONFIG_SYS_THUMB_BUILD +ifndef CONFIG_HAS_THUMB2 + +CFLAGS_cpu.o := -marm +CFLAGS_cache.o := -marm + +endif +endif diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index e5c1a6ae6c..2839c863e8 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -82,4 +82,9 @@ void flush_dcache_all(void) /* * Stub implementations for l2 cache operations */ + __weak void l2_cache_disable(void) {} + +#if defined CONFIG_SYS_THUMB_BUILD +__weak void invalidate_l2_cache(void) {} +#endif |
