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authorPrabhakar Kushwaha <prabhakar@freescale.com>2015-06-02 10:55:52 +0530
committerYork Sun <yorksun@freescale.com>2015-07-20 11:44:36 -0700
commit5c05508971ff9cd0a989f2013d8cd036c89f3e5c (patch)
tree89ea3f4c4f791792fd722e6738dc8b37550e995f /README
parentf299b5b0d244b7c4ef4820acb83fc562ff099413 (diff)
downloadtalos-obmc-uboot-5c05508971ff9cd0a989f2013d8cd036c89f3e5c.zip
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armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr
The agreed split of the top of memory is 256M for debug server and 256M for MC. This patch implements the split. In addition, the MC mem must be 512MB aligned, so the amount of memory to hide must be 512MB to achieve that alignment. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@@ -5063,6 +5063,21 @@ within that device.
normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
virtual address in NOR flash.
+Freescale Layerscape Debug Server Support:
+-------------------------------------------
+The Freescale Layerscape Debug Server Support supports the loading of
+"Debug Server firmware" and triggering SP boot-rom.
+This firmware often needs to be loaded during U-Boot booting.
+
+- CONFIG_FSL_DEBUG_SERVER
+ Enable the Debug Server for Layerscape SoCs.
+
+- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
+ Define minimum DDR size required for debug server image
+
+- CONFIG_SYS_MEM_TOP_HIDE_MIN
+ Define minimum DDR size to be hided from top of the DDR memory
+
Building the Software:
======================
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