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author | Tom Rini <trini@konsulko.com> | 2015-04-24 13:43:24 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2015-04-24 13:43:24 -0400 |
commit | 3f6dcdb9cd4dbda226a1474f1e9398413e906b41 (patch) | |
tree | fb3a7d7873e9c14a3733197e4cc028ce90827970 /README | |
parent | d8c1d5d5fb6eafbc532982125f006e49f2c40e71 (diff) | |
parent | ab10d73d2fc13bd5baf5024e54ad92641d238bdb (diff) | |
download | talos-obmc-uboot-3f6dcdb9cd4dbda226a1474f1e9398413e906b41.tar.gz talos-obmc-uboot-3f6dcdb9cd4dbda226a1474f1e9398413e906b41.zip |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'README')
-rw-r--r-- | README | 13 |
1 files changed, 13 insertions, 0 deletions
@@ -690,6 +690,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply! + COUNTER_FREQUENCY + Generic timer clock source frequency. + + COUNTER_FREQUENCY_REAL + Generic timer clock source frequency if the real clock is + different from COUNTER_FREQUENCY, and can only be determined + at run time. + NOTE: The following can be machine specific errata. These do have ability to provide rudimentary version and machine specific checks, but expect no product checks. @@ -2395,6 +2403,8 @@ CBFS (Coreboot Filesystem) support - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE If those defines are not set, default value is 100000 for speed, and 0 for slave. + - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3 + - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4 - drivers/i2c/rcar_i2c.c: - activate this driver with CONFIG_SYS_I2C_RCAR @@ -4882,6 +4892,9 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_SYNC_REFRESH Enable sync of refresh for multiple controllers. +- CONFIG_FSL_DDR_BIST + Enable built-in memory test for Freescale DDR controllers. + - CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. |