powerpc: mpc8xx: remove FLAGADM board support

This board has been orphaned for a while and old enough.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

12 files changed, 1 insertions, 1373 deletions

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index d5cec1f27e..2c39244fa7 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -14,9 +14,6 @@ config TARGET_COGENT_MPC8XX
 config TARGET_ESTEEM192E
 	bool "Support ESTEEM192E"
 
-config TARGET_FLAGADM
-	bool "Support FLAGADM"
-
 config TARGET_HERMES
 	bool "Support hermes"
 
@@ -127,7 +124,6 @@ source "board/cogent/Kconfig"
 source "board/eltec/mhpc/Kconfig"
 source "board/emk/top860/Kconfig"
 source "board/esteem192e/Kconfig"
-source "board/flagadm/Kconfig"
 source "board/hermes/Kconfig"
 source "board/icu862/Kconfig"
 source "board/ip860/Kconfig"
diff --git a/board/flagadm/Kconfig b/board/flagadm/Kconfig
deleted file mode 100644
index bc0657e5d0..0000000000
--- a/board/flagadm/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if TARGET_FLAGADM
-
-config SYS_BOARD
-	string
-	default "flagadm"
-
-config SYS_CONFIG_NAME
-	string
-	default "FLAGADM"
-
-endif
diff --git a/board/flagadm/MAINTAINERS b/board/flagadm/MAINTAINERS
deleted file mode 100644
index 606989c04d..0000000000
--- a/board/flagadm/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-FLAGADM BOARD
-M:	Kári Davíðsson <kd@flaga.is>
-S:	Orphan (since 2014-06)
-F:	board/flagadm/
-F:	include/configs/FLAGADM.h
-F:	configs/FLAGADM_defconfig
diff --git a/board/flagadm/Makefile b/board/flagadm/Makefile
deleted file mode 100644
index f2377c8392..0000000000
--- a/board/flagadm/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	= flagadm.o flash.o
diff --git a/board/flagadm/flagadm.c b/board/flagadm/flagadm.c
deleted file mode 100644
index 343cb77409..0000000000
--- a/board/flagadm/flagadm.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-#define	_NOT_USED_	0xFFFFFFFF
-
-/*Orginal table, GPL4 disabled*/
-const uint sdram_table[] =
-{
-	/* single read   (offset 0x00 in upm ram) */
-	0x1f07cc04, 0xeeaeec04, 0x11adcc04, 0xefbbac00,
-	0x1ff74c47,
-	/* Precharge */
-	0x1FF74C05,
-	_NOT_USED_,
-	_NOT_USED_,
-	/* burst read    (offset 0x08 in upm ram) */
-	0x1f07cc04, 0xeeaeec04, 0x00adcc04, 0x00afcc00,
-	0x00afcc00, 0x01afcc00, 0x0fbb8c00, 0x1ff74c47,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/* single write  (offset 0x18 in upm ram) */
-	0x1f27cc04, 0xeeaeac00, 0x01b90c04, 0x1ff74c47,
-	/* Load moderegister */
-	0x1FF74C34, /*Precharge*/
-	0xEFEA8C34, /*NOP*/
-	0x1FB54C35, /*Load moderegister*/
-	_NOT_USED_,
-
-	/* burst write   (offset 0x20 in upm ram) */
-	0x1f07cc04, 0xeeaeac00, 0x00ad4c00, 0x00afcc00,
-	0x00afcc00, 0x01bb8c04, 0x1ff74c47, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/* refresh       (offset 0x30 in upm ram) */
-	0x1ff5cc84, 0xffffec04, 0xffffec04, 0xffffec04,
-	0xffffec84, 0xffffec07, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/* exception     (offset 0x3C in upm ram) */
-	0x7fffec07, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-/* GPL5 driven every cycle */
-/* the display and the DSP */
-const uint dsp_disp_table[] =
-{
-	/* single read   (offset 0x00 in upm ram) */
-	0xffffc80c, 0xffffc004, 0x0fffc004, 0x0fffd004,
-	0x0fffc000, 0x0fffc004, 0x3fffc004, 0xffffcc05,
-	/* burst read    (offset 0x08 in upm ram) */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/* single write  (offset 0x18 in upm ram) */
-	0xffffcc0c, 0xffffc004, 0x0fffc004, 0x0fffd004,
-	0x0fffc000, 0x0fffc004, 0x7fffc004, 0xfffffc05,
-	/* burst write   (offset 0x20 in upm ram) */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/* refresh       (offset 0x30 in upm ram) */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-	/* exception     (offset 0x3C in upm ram) */
-	_NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-};
-
-int checkboard (void)
-{
-	puts ("Board: FlagaDM V3.0\n");
-	return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size_b0;
-
-	memctl->memc_or2 = CONFIG_SYS_OR2;
-	memctl->memc_br2 = CONFIG_SYS_BR2;
-
-	udelay(100);
-	upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
-	memctl->memc_mptpr = MPTPR_PTP_DIV16;
-	memctl->memc_mamr = CONFIG_SYS_MAMR_48_SDR | MAMR_TLFA_1X;
-
-	/*Do the initialization of the SDRAM*/
-	/*Start with the precharge cycle*/
-	memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
-				MCR_MLCF(1) | MCR_MAD(0x5));
-
-	/*Then we need two refresh cycles*/
-	memctl->memc_mamr = CONFIG_SYS_MAMR_48_SDR | MAMR_TLFA_2X;
-	memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
-				MCR_MLCF(2) | MCR_MAD(0x30));
-
-	/*Mode register programming*/
-	memctl->memc_mar = 0x00000088; /*CAS Latency = 2 and burst length = 4*/
-	memctl->memc_mcr = (MCR_OP_RUN | MCR_UPM_A | MCR_MB_CS2 | \
-				MCR_MLCF(1) | MCR_MAD(0x1C));
-
-	/* That should do it, just enable the periodic refresh in burst of 4*/
-	memctl->memc_mamr = CONFIG_SYS_MAMR_48_SDR | MAMR_TLFA_4X;
-	memctl->memc_mamr |= (MAMR_PTAE | MAMR_GPL_A4DIS);
-
-	size_b0 = 16*1024*1024;
-
-	/*
-	 * No bank 1 or 3
-	 * invalidate bank
-	 */
-	memctl->memc_br1 = 0;
-	memctl->memc_br3 = 0;
-
-	upmconfig(UPMB, (uint *)dsp_disp_table, sizeof(dsp_disp_table)/sizeof(uint));
-
-	memctl->memc_mbmr = MBMR_GPL_B4DIS;
-
-	memctl->memc_or4 = CONFIG_SYS_OR4;
-	memctl->memc_br4 = CONFIG_SYS_BR4;
-
-	return (size_b0);
-}
diff --git a/board/flagadm/flash.c b/board/flagadm/flash.c
deleted file mode 100644
index 46a2c9a266..0000000000
--- a/board/flagadm/flash.c
+++ /dev/null
@@ -1,687 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-#include <flash.h>
-
-flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-ulong flash_recognize (vu_long *base);
-int write_word (flash_info_t *info, ulong dest, ulong data);
-void flash_get_geometry (vu_long *base, flash_info_t *info);
-void flash_unprotect(flash_info_t *info);
-int _flash_real_protect(flash_info_t *info, long idx, int on);
-
-
-unsigned long flash_init (void)
-{
-	volatile immap_t	*immap  = (immap_t *)CONFIG_SYS_IMMR;
-	volatile memctl8xx_t	*memctl = &immap->im_memctl;
-	int i;
-	int rec;
-
-	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	*((vu_short*)CONFIG_SYS_FLASH_BASE) = 0xffff;
-
-	flash_get_geometry ((vu_long*)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-	/* Remap FLASH according to real size */
-	memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-flash_info[0].size & 0xFFFF8000);
-	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) |
-		(memctl->memc_br0 & ~(BR_BA_MSK));
-
-	rec = flash_recognize((vu_long*)CONFIG_SYS_FLASH_BASE);
-
-	if (rec == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-				flash_info[0].size, flash_info[0].size<<20);
-	}
-
-#if CONFIG_SYS_FLASH_PROTECTION
-	/*Unprotect all the flash memory*/
-	flash_unprotect(&flash_info[0]);
-#endif
-
-	*((vu_short*)CONFIG_SYS_FLASH_BASE) = 0xffff;
-
-	return (flash_info[0].size);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-	/* monitor protection ON by default */
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_SYS_MONITOR_BASE,
-		      CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
-		      &flash_info[0]);
-#endif
-
-#ifdef	CONFIG_ENV_IS_IN_FLASH
-	/* ENV protection ON by default */
-	flash_protect(FLAG_PROTECT_SET,
-		      CONFIG_ENV_OFFSET,
-		      CONFIG_ENV_OFFSET+CONFIG_ENV_SIZE-1,
-		      &flash_info[0]);
-#endif
-	return (flash_info[0].size);
-}
-
-
-int flash_get_protect_status(flash_info_t * info, long idx)
-{
-	vu_short * base;
-	ushort res;
-
-#ifdef DEBUG
-	printf("\n Attempting to set protection info with %d sectors\n", info->sector_count);
-#endif
-
-
-	base = (vu_short*)info->start[idx];
-
-	*(base) = 0xffff;
-
-	*(base + 0x55) = 0x0098;
-	res = base[0x2];
-
-	*(base) = 0xffff;
-
-	if(res != 0)
-		res = 1;
-	else
-		res = 0;
-
-	return res;
-}
-
-void flash_get_geometry (vu_long *base, flash_info_t *info)
-{
-	int i,j;
-	ulong ner = 0;
-	vu_short * sb  = (vu_short*)base;
-	ulong offset = (ulong)base;
-
-	/* Read Device geometry */
-
-	*sb = 0xffff;
-
-	*sb = 0x0090;
-
-	info->flash_id = ((ulong)base[0x0]);
-#ifdef DEBUG
-	printf("Id is %x\n", (uint)(ulong)info->flash_id);
-#endif
-
-	*sb = 0xffff;
-
-	*(sb+0x55) = 0x0098;
-
-	info->size = 1 << (sb[0x27]); /* Read flash size */
-
-#ifdef DEBUG
-	printf("Size is %x\n", (uint)(ulong)info->size);
-#endif
-
-	*sb = 0xffff;
-
-	*(sb + 0x55) = 0x0098;
-	ner = sb[0x2c] ; /*Number of erase regions*/
-
-#ifdef DEBUG
-	printf("Number of erase regions %x\n", (uint)ner);
-#endif
-
-	info->sector_count = 0;
-
-	for(i = 0; i < ner; i++)
-	{
-		uint s;
-		uint count;
-		uint t1,t2,t3,t4;
-
-		*sb = 0xffff;
-
-		*(sb + 0x55) = 0x0098;
-
-		t1 = sb[0x2d + i*4];
-		t2 = sb[0x2e + i*4];
-		t3 = sb[0x2f + i*4];
-		t4 = sb[0x30 + i*4];
-
-		count = ((t1 & 0x00ff) | (((t2 & 0x00ff) << 8) & 0xff00) )+ 1; /*sector count*/
-		s = ((t3 & 0x00ff) | (((t4 & 0x00ff) << 8) & 0xff00)) * 256;; /*Sector size*/
-
-#ifdef DEBUG
-		printf("count and size %x, %x\n", count, s);
-		printf("sector count for erase region %d is %d\n", i, count);
-#endif
-		for(j = 0; j < count; j++)
-		{
-#ifdef DEBUG
-			printf("%x, ", (uint)offset);
-#endif
-			info->start[ info->sector_count + j] = offset;
-			offset += s;
-		}
-		info->sector_count += count;
-	}
-
-	if ((offset - (ulong)base) != info->size)
-		printf("WARNING reported size %x does not match to calculted size %x.\n"
-				, (uint)info->size, (uint)(offset - (ulong)base) );
-
-	/* Next check if there are any sectors protected.*/
-
-	for(i = 0; i < info->sector_count; i++)
-		info->protect[i] = flash_get_protect_status(info, i);
-
-	*sb = 0xffff;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info  (flash_info_t *info)
-{
-	int i;
-
-	if (info->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		return ;
-	}
-
-	switch (info->flash_id & FLASH_VENDMASK) {
-	case INTEL_MANUFACT & FLASH_VENDMASK:
-		printf ("Intel ");
-		break;
-	default:
-		printf ("Unknown Vendor ");
-		break;
-	}
-
-	switch (info->flash_id & FLASH_TYPEMASK) {
-	case INTEL_ID_28F320C3B & FLASH_TYPEMASK:
-		printf ("28F320RC3(4 MB)\n");
-		break;
-	case INTEL_ID_28F320J3A:
-		printf("28F320J3A (4 MB)\n");
-		break;
-	default:
-		printf ("Unknown Chip Type\n");
-			break;
-	}
-
-	printf ("  Size: %ld MB in %d Sectors\n",
-		info->size >> 20, info->sector_count);
-
-	printf ("  Sector Start Addresses:");
-	for (i=0; i<info->sector_count; ++i) {
-		if ((i % 4) == 0)
-			printf ("\n   ");
-		printf ("  %02d %08lX%s",
-			i, info->start[i],
-			info->protect[i]!=0 ? " (RO)" : "     "
-		);
-	}
-	printf ("\n");
-	return ;
-}
-
-ulong flash_recognize (vu_long *base)
-{
-	ulong id;
-	ulong res = FLASH_UNKNOWN;
-	vu_short * sb = (vu_short*)base;
-
-	*sb = 0xffff;
-
-	*sb = 0x0090;
-	id = base[0];
-
-	switch (id & 0x00FF0000)
-	{
-		case (MT_MANUFACT & 0x00FF0000):	/* MT or => Intel */
-		case (INTEL_ALT_MANU & 0x00FF0000):
-		res = FLASH_MAN_INTEL;
-		break;
-	default:
-		res = FLASH_UNKNOWN;
-	}
-
-	*sb = 0xffff;
-
-	return res;
-}
-
-/*-----------------------------------------------------------------------*/
-#define INTEL_FLASH_STATUS_BLS	0x02
-#define INTEL_FLASH_STATUS_PSS	0x04
-#define INTEL_FLASH_STATUS_VPPS	0x08
-#define INTEL_FLASH_STATUS_PS	0x10
-#define INTEL_FLASH_STATUS_ES	0x20
-#define INTEL_FLASH_STATUS_ESS	0x40
-#define INTEL_FLASH_STATUS_WSMS	0x80
-
-int	flash_decode_status_bits(char status)
-{
-	int err = 0;
-
-	if(!(status & INTEL_FLASH_STATUS_WSMS)) {
-		printf("Busy\n");
-		err = -1;
-	}
-
-	if(status & INTEL_FLASH_STATUS_ESS) {
-		printf("Erase suspended\n");
-		err = -1;
-	}
-
-	if(status & INTEL_FLASH_STATUS_ES) {
-		printf("Error in block erase\n");
-		err = -1;
-	}
-
-	if(status & INTEL_FLASH_STATUS_PS) {
-		printf("Error in programming\n");
-		err = -1;
-	}
-
-	if(status & INTEL_FLASH_STATUS_VPPS) {
-		printf("Vpp low, operation aborted\n");
-		err = -1;
-	}
-
-	if(status & INTEL_FLASH_STATUS_PSS) {
-		printf("Program is suspended\n");
-		err = -1;
-	}
-
-	if(status & INTEL_FLASH_STATUS_BLS) {
-		printf("Attempting to program/erase a locked sector\n");
-		err = -1;
-	}
-
-	if((status & INTEL_FLASH_STATUS_PS) &&
-	   (status & INTEL_FLASH_STATUS_ES) &&
-	   (status & INTEL_FLASH_STATUS_ESS)) {
-		printf("A command sequence error\n");
-		return -1;
-	}
-
-	return err;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int	flash_erase (flash_info_t *info, int s_first, int s_last)
-{
-	vu_short *addr;
-	int flag, prot, sect;
-	ulong start, now;
-	int rcode = 0;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (info->flash_id == FLASH_UNKNOWN) {
-			printf ("- missing\n");
-		} else {
-			printf ("- no sectors to erase\n");
-		}
-		return 1;
-	}
-
-	if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) {
-		printf ("Can't erase unknown flash type %08lx - aborted\n",
-			info->flash_id);
-		return 1;
-	}
-
-	prot = 0;
-	for (sect=s_first; sect<=s_last; ++sect) {
-		if (info->protect[sect]) {
-			prot++;
-		}
-	}
-
-	if (prot) {
-		printf ("- Warning: %d protected sectors will not be erased!\n",
-			prot);
-	} else {
-		printf ("\n");
-	}
-
-	start = get_timer (0);
-
-	/* Start erase on unprotected sectors */
-	for (sect = s_first; sect<=s_last; sect++) {
-		char tmp;
-
-		if (info->protect[sect] == 0) {	/* not protected */
-			addr = (vu_short *)(info->start[sect]);
-
-			/* Disable interrupts which might cause a timeout here */
-			flag = disable_interrupts();
-
-			/* Single Block Erase Command */
-			*addr = 0x0020;
-			/* Confirm */
-			*addr = 0x00D0;
-			/* Resume Command, as per errata update */
-			*addr = 0x00D0;
-
-			/* re-enable interrupts if necessary */
-			if (flag)
-				enable_interrupts();
-
-			*addr = 0x70; /*Read status register command*/
-			tmp = (short)*addr & 0x00FF; /* Read the status */
-			while (!(tmp & INTEL_FLASH_STATUS_WSMS)) {
-				if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-					*addr = 0x0050; /* Reset the status register */
-					*addr = 0xffff;
-					printf ("Timeout\n");
-					return 1;
-				}
-				/* show that we're waiting */
-				if ((now - start) > 1000) {	/* every second */
-					putc ('.');
-				}
-				udelay(100000); /* 100 ms */
-				*addr = 0x0070; /*Read status register command*/
-				tmp = (short)*addr & 0x00FF; /* Read status */
-				start = get_timer(0);
-			}
-			if( tmp & INTEL_FLASH_STATUS_ES )
-				flash_decode_status_bits(tmp);
-
-			*addr = 0x0050; /* Reset the status register */
-			*addr = 0xffff; /* Reset to read mode */
-		}
-	}
-
-
-	printf (" done\n");
-	return rcode;
-}
-
-void flash_unprotect (flash_info_t *info)
-{
-	/*We can only unprotect the whole flash at once*/
-	/*Therefore we must prevent the _flash_real_protect()*/
-	/*from re-protecting sectors, that ware protected before */
-	/*we called flash_real_protect();*/
-
-	int i;
-
-	for(i = 0; i < info->sector_count; i++)
-		info->protect[i] = 0;
-
-#ifdef CONFIG_SYS_FLASH_PROTECTION
-		_flash_real_protect(info, 0, 0);
-#endif
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-	ulong cp, wp, data;
-	int i, l, rc;
-
-	wp = (addr & ~3);	/* get lower word aligned address */
-
-	/*
-	 * handle unaligned start bytes
-	 */
-	if ((l = addr - wp) != 0) {
-		data = 0;
-		for (i=0, cp=wp; i<l; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-		for (; i<4 && cnt>0; ++i) {
-			data = (data << 8) | *src++;
-			--cnt;
-			++cp;
-		}
-		for (; cnt==0 && i<4; ++i, ++cp) {
-			data = (data << 8) | (*(uchar *)cp);
-		}
-
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp += 4;
-	}
-
-	/*
-	 * handle word aligned part
-	 */
-	while (cnt >= 4) {
-		data = 0;
-		for (i=0; i<4; ++i) {
-			data = (data << 8) | *src++;
-		}
-		if ((rc = write_word(info, wp, data)) != 0) {
-			return (rc);
-		}
-		wp  += 4;
-		cnt -= 4;
-	}
-
-	if (cnt == 0) {
-		return (0);
-	}
-
-	/*
-	 * handle unaligned tail bytes
-	 */
-	data = 0;
-	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
-		data = (data << 8) | *src++;
-		--cnt;
-	}
-	for (; i<4; ++i, ++cp) {
-		data = (data << 8) | (*(uchar *)cp);
-	}
-
-	return (write_word(info, wp, data));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-int write_word (flash_info_t *info, ulong dest, ulong da)
-{
-	vu_short *addr = (vu_short *)dest;
-	ulong start;
-	char csr;
-	int flag;
-	int i;
-	union {
-		u32 data32;
-		u16 data16[2];
-	} data;
-
-	data.data32 = da;
-
-	/* Check if Flash is (sufficiently) erased */
-	if (((*addr & data.data16[0]) != data.data16[0]) ||
-	    ((*(addr+1) & data.data16[1]) != data.data16[1])) {
-		return (2);
-	}
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-
-	for(i = 0; i < 2; i++)
-	{
-		/* Write Command */
-		*addr = 0x0010;
-
-		/* Write Data */
-		*addr = data.data16[i];
-
-		/* re-enable interrupts if necessary */
-		if (flag)
-			enable_interrupts();
-
-		/* data polling for D7 */
-		start = get_timer (0);
-		flag  = 0;
-		*addr = 0x0070; /*Read statusregister command */
-		while (((csr = *addr) & INTEL_FLASH_STATUS_WSMS)!=INTEL_FLASH_STATUS_WSMS) {
-			if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-				flag = 1;
-				break;
-			}
-			*addr = 0x0070; /*Read statusregister command */
-		}
-		if (csr & INTEL_FLASH_STATUS_PSS) {
-			printf ("CSR indicates write error (%0x) at %08lx\n",
-					csr, (ulong)addr);
-			flag = 1;
-		}
-
-		/* Clear Status Registers Command */
-		*addr = 0x0050;
-		/* Reset to read array mode */
-		*addr = 0xffff;
-		addr++;
-	}
-
-	return (flag);
-}
-
-int flash_real_protect(flash_info_t *info, long offset, int prot)
-{
-	int i, idx;
-
-	for(idx = 0; idx < info->sector_count; idx++)
-		if(info->start[idx] == offset)
-			break;
-
-	if(idx==info->sector_count)
-		return -1;
-
-	if(prot == 0) {
-		/* Unprotect one sector, which means unprotect all flash
-		 * and reprotect the other protected sectors.
-		 */
-		_flash_real_protect(info, 0, 0); /* Unprotects the whole flash*/
-		info->protect[idx] = 0;
-
-		for(i = 0; i < info->sector_count; i++)
-			if(info->protect[i])
-				_flash_real_protect(info, i, 1);
-		}
-	else {
-		/* We can protect individual sectors */
-		_flash_real_protect(info, idx, 1);
-	}
-
-	for( i = 0; i < info->sector_count; i++)
-		info->protect[i] = flash_get_protect_status(info, i);
-
-	return 0;
-}
-
-int _flash_real_protect(flash_info_t *info, long idx, int prot)
-{
-	vu_short *addr;
-	int flag;
-	ushort cmd;
-	ushort tmp;
-	ulong now, start;
-
-	if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) {
-		printf ("Can't change protection for unknown flash type %08lx - aborted\n",
-			info->flash_id);
-		return -1;
-	}
-
-	if(prot == 0) {
-		/*Unlock the sector*/
-		cmd = 0x00D0;
-	}
-	else {
-		/*Lock the sector*/
-		cmd = 0x0001;
-	}
-
-	addr = (vu_short *)(info->start[idx]);
-
-	/* If chip is busy, wait for it */
-	start = get_timer(0);
-	*addr = 0x0070; /*Read status register command*/
-	tmp = ((ushort)(*addr))&0x00ff; /*Read the status*/
-	while(!(tmp & INTEL_FLASH_STATUS_WSMS)) {
-		/*Write State Machine Busy*/
-		/*Wait untill done or timeout.*/
-		if ((now=get_timer(start)) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			*addr = 0x0050; /* Reset the status register */
-			*addr = 0xffff; /* Reset the chip */
-			printf ("TTimeout\n");
-			return 1;
-		}
-		*addr = 0x0070;
-		tmp = ((ushort)(*addr))&0x00ff; /*Read the status*/
-		start = get_timer(0);
-	}
-
-	/* Disable interrupts which might cause a timeout here */
-	flag = disable_interrupts();
-
-	/* Unlock block*/
-	*addr = 0x0060;
-
-	*addr = cmd;
-
-	/* re-enable interrupts if necessary */
-	if (flag)
-		enable_interrupts();
-
-	start = get_timer(0);
-	*addr = 0x0070; /*Read status register command*/
-	tmp = ((ushort)(*addr)) & 0x00FF; /* Read the status */
-	while (!(tmp & INTEL_FLASH_STATUS_WSMS)) {
-		/* Write State Machine Busy */
-		if ((now=get_timer(start)) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			*addr = 0x0050; /* Reset the status register */
-			*addr = 0xffff;
-			printf ("Timeout\n");
-			return 1;
-		}
-		/* show that we're waiting */
-		if ((now - start) > 1000) {	/* every second */
-			putc ('.');
-		}
-		udelay(100000); /* 100 ms */
-		*addr = 0x70; /*Read status register command*/
-		tmp = (short)*addr & 0x00FF; /* Read status */
-		start = get_timer(0);
-	}
-	if( tmp & INTEL_FLASH_STATUS_PS )
-		flash_decode_status_bits(tmp);
-
-	*addr =0x0050; /*Clear status register*/
-
-	/* reset to read mode */
-	*addr = 0xffff;
-
-	return 0;
-}
diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds
deleted file mode 100644
index 7ae91ffb2e..0000000000
--- a/board/flagadm/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2001-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug
deleted file mode 100644
index b0091db0c6..0000000000
--- a/board/flagadm/u-boot.lds.debug
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib/vsprintf.o	(.text)
-    lib/crc32.o		(.text)
-
-    . = env_offset;
-    common/env_embedded.o(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}
diff --git a/configs/FLAGADM_defconfig b/configs/FLAGADM_defconfig
deleted file mode 100644
index 6113797016..0000000000
--- a/configs/FLAGADM_defconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-CONFIG_PPC=y
-CONFIG_8xx=y
-CONFIG_TARGET_FLAGADM=y
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 4ae2a6546e..7ef5a225d9 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+flagadm          powerpc     mpc8xx         -           -           Kári Davíðsson <kd@flaga.is>
 gen860t          powerpc     mpc8xx         -           -           Keith Outwater <Keith_Outwater@mvis.com>
 sixnet           powerpc     mpc8xx         -           -           Dave Ellis <DGE@sixnetio.com>
 svm_sc8xx        powerpc     mpc8xx         -           -           John Zhan <zhanz@sinovee.com>
diff --git a/include/commproc.h b/include/commproc.h
index 76a62deba0..82a1a985b2 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -456,27 +456,6 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00002c00)
 #endif	/* CONFIG_BSEIP */
 
-/***  BSEIP  **********************************************************/
-
-#ifdef CONFIG_FLAGADM
-/* Enet configuration for the FLAGADM */
-/* Enet on SCC2 */
-
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-#define PA_ENET_RXD	((ushort)0x0004)
-#define PA_ENET_TXD	((ushort)0x0008)
-#define PA_ENET_TCLK	((ushort)0x0100)
-#define PA_ENET_RCLK	((ushort)0x0400)
-#define PB_ENET_TENA	((uint)0x00002000)
-#define PC_ENET_CLSN	((ushort)0x0040)
-#define PC_ENET_RENA	((ushort)0x0080)
-
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00003400)
-#endif	/* CONFIG_FLAGADM */
-
 /***  ELPT860 *********************************************************/
 
 #ifdef CONFIG_ELPT860
diff --git a/include/configs/FLAGADM.h b/include/configs/FLAGADM.h
deleted file mode 100644
index d93223fa40..0000000000
--- a/include/configs/FLAGADM.h
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC823		1	/* This is a MPC823 CPU		*/
-#define CONFIG_FLAGADM		1	/* ...on a FLAGA DM	*/
-#define CONFIG_8xx_GCLK_FREQ 48000000	/*48MHz*/
-
-#define	CONFIG_SYS_TEXT_BASE	0x40000000
-
-#undef	CONFIG_8xx_CONS_SMC1		/* Console is on SMC1		*/
-#define CONFIG_8xx_CONS_SMC2	1
-#undef	CONFIG_8xx_CONS_NONE
-
-#define CONFIG_BAUDRATE		115200	/* console baudrate = 115kbps	*/
-#define CONFIG_BOOTDELAY	3	/* autoboot after 5 seconds	*/
-
-#undef	CONFIG_CLOCKS_IN_MHZ
-
-#if 0
-#define CONFIG_BOOTARGS		"root=/dev/nfs rw ip=bootp"
-#define CONFIG_BOOTCOMMAND							\
-   "setenv bootargs root=/dev/ram ip=off panic=1;"     \
-   "bootm 40040000 400e0000"
-#else
-#define CONFIG_BOOTARGS		"root=/dev/nfs rw ip=bootp panic=1"
-#define CONFIG_BOOTCOMMAND	"bootp 0x400000; bootm 0x400000"
-#endif /* 0|1*/
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	CONFIG_SYS_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
-
-/*#define	CONFIG_WATCHDOG*/	/* watchdog enabled		*/
-#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-/*
- * Command line configuration.
- */
-
-#define CONFIG_CMD_BDI
-#define CONFIG_CMD_IMI
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_FLASH
-#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_NET
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"EEG> "		/* Monitor Command Prompt	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
-#else
-#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size	*/
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0100000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0f00000	/* 1 ... 15 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x40040000	/* default load address */
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFF000000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0x40000000
-#define CONFIG_SYS_MONITOR_LEN		(128 << 10)	/* Reserve 128 kB for Monitor	*/
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	71	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	8000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-#define CONFIG_ENV_IS_IN_FLASH	1
-/* This is a litlebit wasteful, but one sector is 128kb and we have to
- * assigne a whole sector for the environment, so that we can safely
- * erase and write it without disturbing the boot sector
- */
-#define CONFIG_ENV_OFFSET		0x20000 /*   Offset   of Environment Sector	*/
-#define CONFIG_ENV_SIZE		0x20000 /* Total Size of Environment Sector	*/
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
-#endif
-#define CONFIG_SYS_DELAYED_ICACHE	1	/* enable ICache not before
-						 * running in RAM.
-						 */
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#ifdef CONFIG_WATCHDOG
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_SWF | SYPCR_SWE | SYPCR_SWRI | SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_PRE_SIUMCR (SIUMCR_DBGC11 | SIUMCR_MPRE | \
-							SIUMCR_MLRC01 | SIUMCR_GB5E)
-#define CONFIG_SYS_SIUMCR (CONFIG_SYS_PRE_SIUMCR | SIUMCR_DLK)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register		11-27
- *-----------------------------------------------------------------------
- */
-#define CONFIG_SYS_RTCSC	(RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit miltiplier of 0x00b i.e. operation clock is
- * 4MHz * (0x00b+1) = 4MHz * 12 =  48MHz
- */
-#define CONFIG_SYS_PLPRCR	(0x00b00000 | PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK	SCCR_EBDF11
-#define CONFIG_SYS_SCCR	( SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00)
-
-#define CONFIG_SYS_DER 0
-
-/*
- * In the Flaga DM we have:
- * Flash on BR0/OR0/CS0a at 0x40000000
- * Display on BR1/OR1/CS1 at 0x20000000
- * SDRAM on BR2/OR2/CS2 at 0x00000000
- * Free BR3/OR3/CS3
- * DSP1 on BR4/OR4/CS4 at 0x80000000
- * DSP2 on BR5/OR5/CS5 at 0xa0000000
- *
- * For now we just configure the Flash and the SDRAM and leave the others
- * untouched.
-*/
-
-#define CONFIG_SYS_FLASH_PROTECTION 0
-
-#define FLASH_BASE0		0x40000000	/* FLASH bank #0	*/
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-#define CONFIG_SYS_OR_AM		0xff000000	/* OR addr mask */
-#define CONFIG_SYS_OR_ATM		0x00006000
-
-/* FLASH timing: ACS = 10, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1	*/
-#define CONFIG_SYS_OR_TIMING_FLASH	(OR_CSNT_SAM  | OR_ACS_DIV4 | OR_BI | \
-				 OR_SCY_3_CLK | OR_TRLX | OR_EHTR )
-
-#define CONFIG_SYS_OR0_PRELIM	(CONFIG_SYS_OR_AM | CONFIG_SYS_OR_ATM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM	((FLASH_BASE0 & BR_BA_MSK) | BR_PS_16 | BR_V )
-
-/*
- * BR2 and OR2 (SDRAM)
- *
- */
-#define SDRAM_BASE2			0x00000000	/* SDRAM bank #0	*/
-#define SDRAM_MAX_SIZE		0x04000000	/* max 64 MB per bank	*/
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	( 0x00000800 )
-
-#define CONFIG_SYS_OR2_PRELIM	(CONFIG_SYS_OR_AM | CONFIG_SYS_OR_TIMING_SDRAM)
-#define CONFIG_SYS_BR2_PRELIM	((SDRAM_BASE2 & BR_BA_MSK) | BR_MS_UPMA | BR_V )
-
-#define CONFIG_SYS_BR2			CONFIG_SYS_BR2_PRELIM
-#define CONFIG_SYS_OR2			CONFIG_SYS_OR2_PRELIM
-
-/*
- * MAMR settings for SDRAM
- */
-#define CONFIG_SYS_MAMR_48_SDR (CONFIG_SYS_MAMR_PTA |	 MAMR_WLFA_1X | MAMR_RLFA_1X  \
-					| MAMR_G0CLA_A11)
-
-/*
- * Memory Periodic Timer Prescaler
- */
-
-/* periodic timer for refresh */
-#define CONFIG_SYS_MAMR_PTA	0x0F000000
-
-/*
-   * BR4 and OR4 (DSP1)
-   *
-   * We do not wan't preliminary setup of the DSP, anyway we need the
-   * UPMB setup correctly before we can access the DSP.
-   *
-*/
-#define DSP_BASE 0x80000000
-
-#define CONFIG_SYS_OR4 ( OR_AM_MSK | OR_CSNT_SAM | OR_BI | OR_G5LS)
-#define CONFIG_SYS_BR4 ( (DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_UPMB | BR_V )
-
-#endif	/* __CONFIG_H */