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| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-12-02 13:31:33 -0600 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-12-20 03:44:56 +0100 |
| commit | a1684b61054714daae7250e570fe3298f86605b7 (patch) | |
| tree | 210b22842979b46e669bd3b39cc5f081019d42e1 | |
| parent | e5ad7d9889f6c2af625449dcb4487a3936709e50 (diff) | |
| download | talos-obmc-uboot-a1684b61054714daae7250e570fe3298f86605b7.tar.gz talos-obmc-uboot-a1684b61054714daae7250e570fe3298f86605b7.zip | |
arm: socfpga: fix up a questionable macro for SDMMC
Move the macro into the socfpga_dwmci_clksel().
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Marek Vasut <marex@denx.de>
[fix parenthesis in the sdmmc_mask]
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/system_manager.h | 10 | ||||
| -rw-r--r-- | drivers/mmc/socfpga_dw_mmc.c | 5 |
2 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index 8712f8ea11..c45edea32d 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -129,9 +129,13 @@ struct socfpga_system_manager { #define SYSMGR_FPGAINTF_NAND (1 << 4) #define SYSMGR_FPGAINTF_SDMMC (1 << 5) -/* FIXME: This is questionable macro. */ -#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \ - ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38)) +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 3 +#else +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 +#endif + +#define SYSMGR_SDMMC_DRVSEL_SHIFT 0 /* EMAC Group Bit definitions */ #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index 5b0c3a8eda..43a7e7ea32 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -33,6 +33,8 @@ struct dwmci_socfpga_priv_data { static void socfpga_dwmci_clksel(struct dwmci_host *host) { struct dwmci_socfpga_priv_data *priv = host->priv; + u32 sdmmc_mask = ((priv->smplsel & 0x7) << SYSMGR_SDMMC_SMPLSEL_SHIFT) | + ((priv->drvsel & 0x7) << SYSMGR_SDMMC_DRVSEL_SHIFT); /* Disable SDMMC clock. */ clrbits_le32(&clock_manager_base->per_pll.en, @@ -40,8 +42,7 @@ static void socfpga_dwmci_clksel(struct dwmci_host *host) debug("%s: drvsel %d smplsel %d\n", __func__, priv->drvsel, priv->smplsel); - writel(SYSMGR_SDMMC_CTRL_SET(priv->smplsel, priv->drvsel), - &system_manager_base->sdmmcgrp_ctrl); + writel(sdmmc_mask, &system_manager_base->sdmmcgrp_ctrl); debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__, readl(&system_manager_base->sdmmcgrp_ctrl)); |
