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authorKumar Gala <galak@kernel.crashing.org>2008-12-16 14:59:22 -0600
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-12-19 18:20:08 -0600
commit9d94aff699eed38b286814fcbb335f3eb8516a0e (patch)
treefdbdcbc6e04238cd16065480aa780b8596f35d77
parent77c8115b1f1871811633eae77a5a700fac1f0e50 (diff)
downloadtalos-obmc-uboot-9d94aff699eed38b286814fcbb335f3eb8516a0e.tar.gz
talos-obmc-uboot-9d94aff699eed38b286814fcbb335f3eb8516a0e.zip
NAND FSL elbc: Use virt_to_phys to determine which bank is in use
The current code that determines which bank/chipselect is used for a given NAND instance only worked for 32-bit addresses and assumed a 1:1 mapping. This breaks in 36-bit physical configs. The proper way to handle this is to use the virt_to_phys() and BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address with the the virtual address the NAND code uses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 367c7d7fcd..3f318e02e2 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -718,7 +718,7 @@ static void fsl_elbc_ctrl_init(void)
int board_nand_init(struct nand_chip *nand)
{
struct fsl_elbc_mtd *priv;
- uint32_t br, or;
+ uint32_t br = 0, or = 0;
if (!elbc_ctrl) {
fsl_elbc_ctrl_init();
@@ -737,11 +737,13 @@ int board_nand_init(struct nand_chip *nand)
* if we could pass more than one datum to the NAND driver...
*/
for (priv->bank = 0; priv->bank < MAX_BANKS; priv->bank++) {
+ phys_addr_t base_addr = virt_to_phys(nand->IO_ADDR_R);
+
br = in_be32(&elbc_ctrl->regs->bank[priv->bank].br);
or = in_be32(&elbc_ctrl->regs->bank[priv->bank].or);
if ((br & BR_V) && (br & BR_MSEL) == BR_MS_FCM &&
- (br & or & BR_BA) == (phys_addr_t)nand->IO_ADDR_R)
+ (br & or & BR_BA) == BR_PHYS_ADDR(base_addr))
break;
}
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