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| author | Shaohui Xie <Shaohui.Xie@freescale.com> | 2012-06-28 23:36:38 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-08-08 17:13:38 -0500 |
| commit | 98de369b1ca49a3c6d1b6408e78d05cbf2f3ea5d (patch) | |
| tree | ca36336dfa710c805b65013996820b6748f7a452 | |
| parent | 0f57f6a3fe26a9c2d69b34e9caf8f83082d77636 (diff) | |
| download | talos-obmc-uboot-98de369b1ca49a3c6d1b6408e78d05cbf2f3ea5d.tar.gz talos-obmc-uboot-98de369b1ca49a3c6d1b6408e78d05cbf2f3ea5d.zip | |
powerpc/ddr: fix fsl_ddr_get_dimm_params compile error
fsl_ddr_get_dimm_params() should be wrapped by
CONFIG_SYS_DDR_RAW_TIMING, otherwise, when using fixed_sdram() instead of
using SPD, it will cause compile error.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/main.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c index f52ad9f691..c2a03e334c 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c @@ -366,7 +366,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, } } -#else +#elif defined(CONFIG_SYS_DDR_RAW_TIMING) case STEP_COMPUTE_DIMM_PARMS: for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { |
