diff options
| author | Siarhei Siamashka <siarhei.siamashka@gmail.com> | 2015-10-08 23:22:45 +0300 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-10-10 11:54:06 +0200 |
| commit | 974936a80feaa431e6a36a96e693cdf399bd91dc (patch) | |
| tree | 3de6f88eab02a2b2997715920654275453d0ab47 | |
| parent | 38ab75a2aa54b97429b2f33ff5d3c7ddcabf1456 (diff) | |
| download | talos-obmc-uboot-974936a80feaa431e6a36a96e693cdf399bd91dc.tar.gz talos-obmc-uboot-974936a80feaa431e6a36a96e693cdf399bd91dc.zip | |
sunxi: Fix pcDuino reliability by downclocking DRAM to 360MHz
Linksprite_pcDuino_defconfig is a generic config for pcDuino1 and
pcDuino2 boards. The pcDuino2 board exists at least in two variants
(with DDR3 chips from HYNIX or NANYA). At least one pcDuino2 board
with HYNIX DDR3 fails the lima-memtester reliability test unless
the DRAM clock speed is reduced to 360MHz.
A detailed analysis report, generated by the a10-tpr3-scan tool with
the explanations why the DRAM is failing at 408MHz, is available at:
http://linux-sunxi.org/index.php?title=User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test&oldid=15152
http://web.archive.org/web/20151008190210/http://linux-sunxi.org/User:Ssvb/pcDuino2_with_HYNIX_DDR3_reliability_test
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| -rw-r--r-- | configs/Linksprite_pcDuino_defconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index de448908ec..68d913731e 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -1,7 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN4I=y -CONFIG_DRAM_CLK=408 CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y |
