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| author | Stuart Yoder <stuart.yoder@nxp.com> | 2016-03-10 10:52:24 -0600 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-03-21 12:42:13 -0700 |
| commit | 7e7e1264707f6a0c5d877c5f8bf816c11d7a6af9 (patch) | |
| tree | b3b978885da526b78a1d7c84e0f6d91a335eb5f2 | |
| parent | eeb5b1ad828dfccf51831c87a10cabf6c564a2a2 (diff) | |
| download | talos-obmc-uboot-7e7e1264707f6a0c5d877c5f8bf816c11d7a6af9.tar.gz talos-obmc-uboot-7e7e1264707f6a0c5d877c5f8bf816c11d7a6af9.zip | |
pci/layerscape: add defines for LUT
The per-PCI controller LUT (Look-Up-Table) is a 32-entry table
that maps PCI requester IDs (bus/dev/fun) to a stream ID.
Add defines for the register offsets.
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 17c150ac8b..081519aef7 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -86,6 +86,10 @@ #define PCIE_LUT_BASE 0x80000 #define PCIE_LUT_LCTRL0 0x7F8 #define PCIE_LUT_DBG 0x7FC +#define PCIE_LUT_UDR(n) (0x800 + (n) * 8) +#define PCIE_LUT_LDR(n) (0x804 + (n) * 8) +#define PCIE_LUT_ENABLE (1 << 31) +#define PCIE_LUT_ENTRY_COUNT 32 /* Device Configuration */ #define DCFG_BASE 0x01e00000 |
