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authorGrzegorz Bernacki <gjb@semihalf.com>2007-09-07 18:35:37 +0200
committerRafal Jaworowski <raj@semihalf.com>2007-09-07 18:35:37 +0200
commit6efc1fc0b63e55f94c5bc61d8dd23c918e3bc778 (patch)
tree460ef1c2867ad29a0d68c3149d910e6ab351bec5
parent7f1913938984ef6c6a46cb53e003719196d9c5de (diff)
downloadtalos-obmc-uboot-6efc1fc0b63e55f94c5bc61d8dd23c918e3bc778.tar.gz
talos-obmc-uboot-6efc1fc0b63e55f94c5bc61d8dd23c918e3bc778.zip
[PPC440SPe] PCIe environment settings for Katmai and Yucca
- 'pciconfighost' is set by default in order to be able to scan bridges behind the primary host/PCIe - 'pciscandelay' env variable is recognized to allow for user-controlled delay before the PCIe bus enumeration; some peripheral devices require a significant delay before they can be scanned (e.g. LSI8408E); without the delay they are not detected Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
-rw-r--r--board/amcc/katmai/katmai.c12
-rw-r--r--board/amcc/yucca/yucca.c12
-rw-r--r--include/configs/katmai.h3
-rw-r--r--include/configs/yucca.h3
4 files changed, 28 insertions, 2 deletions
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index a9ae4a3739..afd60ece62 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -396,6 +396,8 @@ void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
+ char *env;
+ unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
@@ -439,6 +441,16 @@ void pcie_setup_hoses(int busno)
*/
#else
ppc440spe_setup_pcie_rootpoint(hose, i);
+
+ env = getenv ("pciscandelay");
+ if (env != NULL) {
+ delay = simple_strtoul (env, NULL, 10);
+ if (delay > 5)
+ printf ("Warning, expect noticable delay before PCIe"
+ "scan due to 'pciscandelay' value!\n");
+ mdelay (delay * 1000);
+ }
+
/*
* Config access can only go down stream
*/
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 252e4fe07a..397b01873f 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -850,6 +850,8 @@ void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
+ char *env;
+ unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
@@ -895,6 +897,16 @@ void pcie_setup_hoses(int busno)
*/
#else
ppc440spe_setup_pcie_rootpoint(hose, i);
+
+ env = getenv ("pciscandelay");
+ if (env != NULL) {
+ delay = simple_strtoul (env, NULL, 10);
+ if (delay > 5)
+ printf ("Warning, expect noticable delay before PCIe"
+ "scan due to 'pciscandelay' value!\n");
+ mdelay (delay * 1000);
+ }
+
/*
* Config access can only go down stream
*/
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 7834e39084..7908e5a474 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -201,6 +201,7 @@
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
"kozio=bootm ffc60000\0" \
+ "pciconfighost=1\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -322,7 +323,7 @@
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
-#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 323535aa9f..74033b4aef 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -182,6 +182,7 @@
"cp.b ${fileaddr} FFFB0000 ${filesize};" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
+ "pciconfighost=1\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -297,7 +298,7 @@
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
-#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
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