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authorPeter Tyser <ptyser@xes-inc.com>2009-07-17 19:01:08 -0500
committerStefan Roese <sr@denx.de>2009-07-24 06:42:32 +0200
commit42735815dd9ba39efe51203868aebce04053c8de (patch)
tree5b6b90d0d0a7f971cbd72f52b73546609b5976e1
parente02990764c7415c84668823a0fc8c5b4dd8d8cf0 (diff)
downloadtalos-obmc-uboot-42735815dd9ba39efe51203868aebce04053c8de.tar.gz
talos-obmc-uboot-42735815dd9ba39efe51203868aebce04053c8de.zip
xpedite1k: Add support for optional flashes
The XPedite1000 can be built with 4 total flashes: - 512KB AMD socketed - 16MB Intel soldered - 2 x 32MB AMD MirrorBit flashes Add support for the optional 2 32MB CFI-compliant AMD flashes Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r--board/xpedite1k/xpedite1k.c4
-rw-r--r--include/configs/XPEDITE1K.h7
2 files changed, 8 insertions, 3 deletions
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index 369f76a82f..8a3503dd4f 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -46,6 +46,10 @@ int board_early_init_f(void)
mtebc(pb0cr, 0xff098000); /* BAS=0xff0 16MB R/W 8-bit */
mtebc(pb1ap, 0x04055200); /* 512KB Socketed AMD FLASH */
mtebc(pb1cr, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */
+ mtebc(pb6ap, 0x05006400); /* 32-64MB AMD MirrorBit FLASH */
+ mtebc(pb6cr, 0xf00da000); /* BAS=0xf00 64MB R/W i6-bit */
+ mtebc(pb7ap, 0x05006400); /* 32-64MB AMD MirrorBit FLASH */
+ mtebc(pb7cr, 0xf40da000); /* BAS=0xf40 64MB R/W 16-bit */
/*
* Setup the interrupt controller polarities, triggers, etc.
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index f141398128..0aebe27d3a 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -106,12 +106,13 @@ extern void out32(unsigned int, unsigned long);
/*
* FLASH related
*/
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
-#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
-#define CONFIG_SYS_MAX_FLASH_SECT 128 /* sectors per device */
+#define CONFIG_SYS_MAX_FLASH_BANKS 3
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
+#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
#undef CONFIG_SYS_FLASH_CHECKSUM
#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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