diff options
| author | Christian Riesch <christian.riesch@omicron.at> | 2013-06-14 14:22:36 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-07-26 16:39:10 -0400 |
| commit | 3864cb2133b8d4a45dbad603f7b0b9f051d617ff (patch) | |
| tree | 57787024093fc02a3ddebe979747d8732ca1bae5 | |
| parent | bf0e86606df37e3344b14d12e58aa8799a15fe37 (diff) | |
| download | talos-obmc-uboot-3864cb2133b8d4a45dbad603f7b0b9f051d617ff.tar.gz talos-obmc-uboot-3864cb2133b8d4a45dbad603f7b0b9f051d617ff.zip | |
da850evm: Use clrbits function with correct endianess
The current code uses clrbits_be32 which is incorrect since we are on
a little endian machine here. This patch fixes this issue and also removes
some unnecessary code: Reading the current GPIO bank state is not required
if we are using the SET and CLEAR GPIO registers for setting/clearing
bits.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Cc: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
| -rw-r--r-- | board/davinci/da8xxevm/da850evm.c | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 01745b211a..85b483096b 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -323,10 +323,6 @@ int board_early_init_f(void) int board_init(void) { -#if defined(CONFIG_USE_NOR) || defined(CONFIG_DAVINCI_MMC) - u32 val; -#endif - #ifndef CONFIG_USE_IRQ irq_init(); #endif @@ -366,12 +362,10 @@ int board_init(void) #ifdef CONFIG_USE_NOR /* Set the GPIO direction as output */ - clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); + clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); /* Set the output as low */ - val = readl(GPIO_BANK0_REG_SET_ADDR); - val |= (0x01 << 11); - writel(val, GPIO_BANK0_REG_CLR_ADDR); + writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); #endif #ifdef CONFIG_DAVINCI_MMC @@ -379,9 +373,7 @@ int board_init(void) clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); /* Set the output as high */ - val = readl(GPIO_BANK0_REG_SET_ADDR); - val |= (0x01 << 11); - writel(val, GPIO_BANK0_REG_SET_ADDR); + writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR); #endif #ifdef CONFIG_DRIVER_TI_EMAC |
