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| author | Marek Vasut <marex@denx.de> | 2015-07-19 05:40:06 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:19 +0200 |
| commit | 35ee867fc28614dcbd23897f42e78e6cc8ad9151 (patch) | |
| tree | 23c9e02c73131f5352fe572c2afd6e7a5d28e29c | |
| parent | 86a39dc76ef129dd67dad6ae00ce49f014aea6ef (diff) | |
| download | talos-obmc-uboot-35ee867fc28614dcbd23897f42e78e6cc8ad9151.tar.gz talos-obmc-uboot-35ee867fc28614dcbd23897f42e78e6cc8ad9151.zip | |
ddr: altera: Clean up sdr_*_phase() part 7
Wrap dtaps_per_ptap into the sdr_working_phase() function to trim
down the number of params. It's a constant too.
Signed-off-by: Marek Vasut <marex@denx.de>
| -rw-r--r-- | drivers/ddr/altera/sequencer.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 75a0699e84..d93b5fee49 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -1378,11 +1378,12 @@ static int sdr_find_phase(int working, const u32 grp, u32 *v, u32 *work, return -EINVAL; } -static int sdr_working_phase(uint32_t grp, - uint32_t dtaps_per_ptap, uint32_t *work_bgn, - uint32_t *v, uint32_t *d, uint32_t *p, - uint32_t *i) +static int sdr_working_phase(uint32_t grp, uint32_t *work_bgn, + uint32_t *v, uint32_t *d, uint32_t *p, + uint32_t *i) { + const u32 dtaps_per_ptap = IO_DELAY_PER_OPA_TAP / + IO_DELAY_PER_DQS_EN_DCHAIN_TAP; int ret; *work_bgn = 0; @@ -1565,7 +1566,7 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp) /* ******************************************************** */ /* * step 2: find first working phase, increment in ptaps * */ work_bgn = 0; - if (sdr_working_phase(grp, dtaps_per_ptap, &work_bgn, &v, &d, &p, &i)) + if (sdr_working_phase(grp, &work_bgn, &v, &d, &p, &i)) return 0; work_end = work_bgn; |
