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authorGraeme Russ <graeme.russ@gmail.com>2009-08-23 12:59:49 +1000
committerWolfgang Denk <wd@denx.de>2009-09-04 21:51:56 +0200
commit04ff9ab158714d43cdf2f4f6f0235c3ea9d241a2 (patch)
tree7fbb53a4fe49e056cb7284ac5a05f176ade92ac0
parentf3a8d6b29b1cd01fdd940e8ff7a62b1df0ebbf82 (diff)
downloadtalos-obmc-uboot-04ff9ab158714d43cdf2f4f6f0235c3ea9d241a2.tar.gz
talos-obmc-uboot-04ff9ab158714d43cdf2f4f6f0235c3ea9d241a2.zip
Fix sc520 timer interrupt generation
The current implementation has the timer being started before the interrupt handler is installed. It the interrupt occurs before the handler is installed, the timer interrupt is never reset and the timer stops Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
-rw-r--r--cpu/i386/sc520/sc520_timer.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/i386/sc520/sc520_timer.c b/cpu/i386/sc520/sc520_timer.c
index 2cb8656ebd..2a3425b616 100644
--- a/cpu/i386/sc520/sc520_timer.c
+++ b/cpu/i386/sc520/sc520_timer.c
@@ -54,9 +54,6 @@ int timer_init(void)
write_mmcr_word (SC520_GPTMR1MAXCMPA, 100);
write_mmcr_word (SC520_GPTMR1CTL, 0xe009);
- /* Clear the GP Timers status register */
- write_mmcr_byte (SC520_GPTMRSTA, 0x07);
-
/* Register the SC520 specific timer interrupt handler */
register_timer_isr (sc520_timer_isr);
@@ -64,6 +61,9 @@ int timer_init(void)
irq_install_handler (0, timer_isr, NULL);
unmask_irq (0);
+ /* Clear the GP Timer 1 status register to get the show rolling*/
+ write_mmcr_byte (SC520_GPTMRSTA, 0x02);
+
return 0;
}
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