1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
|
/*
* Timer device implementation for SGI UV platform.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2009 Silicon Graphics, Inc. All rights reserved.
*
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/ioctl.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/fs.h>
#include <linux/mmtimer.h>
#include <linux/miscdevice.h>
#include <linux/posix-timers.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/math64.h>
#include <asm/genapic.h>
#include <asm/uv/uv_hub.h>
#include <asm/uv/bios.h>
#include <asm/uv/uv.h>
MODULE_AUTHOR("Dimitri Sivanich <sivanich@sgi.com>");
MODULE_DESCRIPTION("SGI UV Memory Mapped RTC Timer");
MODULE_LICENSE("GPL");
/* name of the device, usually in /dev */
#define UV_MMTIMER_NAME "mmtimer"
#define UV_MMTIMER_DESC "SGI UV Memory Mapped RTC Timer"
#define UV_MMTIMER_VERSION "1.0"
static long uv_mmtimer_ioctl(struct file *file, unsigned int cmd,
unsigned long arg);
static int uv_mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
/*
* Period in femtoseconds (10^-15 s)
*/
static unsigned long uv_mmtimer_femtoperiod;
static const struct file_operations uv_mmtimer_fops = {
.owner = THIS_MODULE,
.mmap = uv_mmtimer_mmap,
.unlocked_ioctl = uv_mmtimer_ioctl,
.llseek = noop_llseek,
};
/**
* uv_mmtimer_ioctl - ioctl interface for /dev/uv_mmtimer
* @file: file structure for the device
* @cmd: command to execute
* @arg: optional argument to command
*
* Executes the command specified by @cmd. Returns 0 for success, < 0 for
* failure.
*
* Valid commands:
*
* %MMTIMER_GETOFFSET - Should return the offset (relative to the start
* of the page where the registers are mapped) for the counter in question.
*
* %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
* seconds
*
* %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
* specified by @arg
*
* %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
*
* %MMTIMER_MMAPAVAIL - Returns 1 if registers can be mmap'd into userspace
*
* %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
* in the address specified by @arg.
*/
static long uv_mmtimer_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int ret = 0;
switch (cmd) {
case MMTIMER_GETOFFSET: /* offset of the counter */
/*
* Starting with HUB rev 2.0, the UV RTC register is
* replicated across all cachelines of it's own page.
* This allows faster simultaneous reads from a given socket.
*
* The offset returned is in 64 bit units.
*/
if (uv_get_min_hub_revision_id() == 1)
ret = 0;
else
ret = ((uv_blade_processor_id() * L1_CACHE_BYTES) %
PAGE_SIZE) / 8;
break;
case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
if (copy_to_user((unsigned long __user *)arg,
&uv_mmtimer_femtoperiod, sizeof(unsigned long)))
ret = -EFAULT;
break;
case MMTIMER_GETFREQ: /* frequency in Hz */
if (copy_to_user((unsigned long __user *)arg,
&sn_rtc_cycles_per_second,
sizeof(unsigned long)))
ret = -EFAULT;
break;
case MMTIMER_GETBITS: /* number of bits in the clock */
ret = hweight64(UVH_RTC_REAL_TIME_CLOCK_MASK);
break;
case MMTIMER_MMAPAVAIL:
ret = 1;
break;
case MMTIMER_GETCOUNTER:
if (copy_to_user((unsigned long __user *)arg,
(unsigned long *)uv_local_mmr_address(UVH_RTC),
sizeof(unsigned long)))
ret = -EFAULT;
break;
default:
ret = -ENOTTY;
break;
}
return ret;
}
/**
* uv_mmtimer_mmap - maps the clock's registers into userspace
* @file: file structure for the device
* @vma: VMA to map the registers into
*
* Calls remap_pfn_range() to map the clock's registers into
* the calling process' address space.
*/
static int uv_mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
{
unsigned long uv_mmtimer_addr;
if (vma->vm_end - vma->vm_start != PAGE_SIZE)
return -EINVAL;
if (vma->vm_flags & VM_WRITE)
return -EPERM;
if (PAGE_SIZE > (1 << 16))
return -ENOSYS;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
uv_mmtimer_addr = UV_LOCAL_MMR_BASE | UVH_RTC;
uv_mmtimer_addr &= ~(PAGE_SIZE - 1);
uv_mmtimer_addr &= 0xfffffffffffffffUL;
if (remap_pfn_range(vma, vma->vm_start, uv_mmtimer_addr >> PAGE_SHIFT,
PAGE_SIZE, vma->vm_page_prot)) {
printk(KERN_ERR "remap_pfn_range failed in uv_mmtimer_mmap\n");
return -EAGAIN;
}
return 0;
}
static struct miscdevice uv_mmtimer_miscdev = {
MISC_DYNAMIC_MINOR,
UV_MMTIMER_NAME,
&uv_mmtimer_fops
};
/**
* uv_mmtimer_init - device initialization routine
*
* Does initial setup for the uv_mmtimer device.
*/
static int __init uv_mmtimer_init(void)
{
if (!is_uv_system()) {
printk(KERN_ERR "%s: Hardware unsupported\n", UV_MMTIMER_NAME);
return -1;
}
/*
* Sanity check the cycles/sec variable
*/
if (sn_rtc_cycles_per_second < 100000) {
printk(KERN_ERR "%s: unable to determine clock frequency\n",
UV_MMTIMER_NAME);
return -1;
}
uv_mmtimer_femtoperiod = ((unsigned long)1E15 +
sn_rtc_cycles_per_second / 2) /
sn_rtc_cycles_per_second;
if (misc_register(&uv_mmtimer_miscdev)) {
printk(KERN_ERR "%s: failed to register device\n",
UV_MMTIMER_NAME);
return -1;
}
printk(KERN_INFO "%s: v%s, %ld MHz\n", UV_MMTIMER_DESC,
UV_MMTIMER_VERSION,
sn_rtc_cycles_per_second/(unsigned long)1E6);
return 0;
}
module_init(uv_mmtimer_init);
|
